50Hzto6GHz,,cf手游无影多少钱

多少钱 4
DataSheet FEATURES uraterms-to-dcconversionfrom50Hzto6GHzSingle-endedinputdynamicrangeof>50dBNobalunorexternalinputtuningrequiredWaveformandmodulationindependentRFpowerdetectionLinear-in-decibelsoutput,scaled:52mV/dBLogconformanceerror:<±0.15dBTemperaturestability:<±0.5dBVoltagesupplyrange:4.5Vto5.5VOperatingtemperaturerange:−40°Cto+125°CPower-downcapabilityto1.5mWSmallfootprint,4mm×4mm,LFCSP APPLICATIONS Poweramplifierlinearization/controlloopsMulti-Standard,Multi-CarrierWirelessInfrastructure (MCGSM,CDMA,WCDMA,TD-SCDMA,WiMAX,LTE)TransmitterpowercontrolTransmittersignalstrengthindication(TSSI)RFinstrumentation GENERALDESCRIPTION TheAD8363isatruermsrespondingpowerdetectorthatcanbedirectlydrivenwithasingle-ended50Ωsource.ThisfeaturemakestheAD8363frequencyversatilebyeliminatingtheneedforabalunoranyotherformofexternalinputtuningforoperationupto6GHz. TheAD8363providesanuratepowermeasurement,independentofwaveform,foravarietyofhighmunicationandinstrumentationsystems.Requiringonlyasinglesupplyof5Vandafewcapacitors,itiseasytouseandprovideshighmeasurementuracy.TheAD8363canoperatefromarbitrarilylowfrequenciesto6GHzandcaneptinputsthathavermsvaluesfromlessthan−50dBmtoatleast0dBm,withlargecrestfactorsexceedingtherequirementsforuratemeasurementofWiMAX,CDMA,W-CDMA,TD-SCDMA,multicarrierGSM,andLTEsignals. TheAD8363candeterminethetruepowerofahighfrequencysignalhavingplexlowfrequencymodulationenvelope,oritcanbeusedasasimplelowfrequencyrmsvoltmeter.Thehighpasscornergeneratedbyitsinternaloffset-nullingloopcanbeloweredbyacapacitoraddedontheCHPFpin. 50Hzto6GHz,50dBTruPwr™Detector AD8363 NC13 FUNCTIONALBLOCKDIAGRAM VTGT VREF VPOS COMM 12 11 10
9 AD8363 8TEMP INHI14INLO15 X27VSET X2 6VOUT 07368-001 TCM116 5CLPF 1TCM2/PWDN 2CHPF 3VPOS Figure1.AD8363BlockDiagram 4COMM Usedasapowermeasurementdevice,VOUTisconnectedtoVSET.Theoutputisthenproportionaltothelogarithmofthermsvalueoftheinput.Thereadingispresenteddirectlyindecibelsandisconvenientlyscaledto52mV/dB,orapproximately1Vperdecade;however,otherslopesareeasilyarranged.Incontrollermode,thevoltageappliedtoVSETdeterminesthepowerlevelrequiredattheinputtonullthedeviationfromthesetpoint.Theoutputbuffercanprovidehighloadcurrents. TheAD8363has1.5mWpowerconsumptionwhenpowereddownbyalogichighappliedtotheTCM2/PWDNpin.Itpowersupwithinabout30μstoitsnominaloperatingcurrentof60mAat25°
C.TheAD8363isavailableina4mm×4mm16-leadLFCSPforoperationoverthe−40°Cto+125°Ctemperaturerange. Afullypopulatedpliantevaluationboardisalsoavailable. Rev.B DocumentFeedback InformationfurnishedbyAnalogDevicesisbelievedtobeurateandreliable.However,no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No licenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. OneTechnologyWay,
P.O.Box9106,Norwood,MA02062-9106,
U.S.A. Tel:781.329.4700©2009–2015AnalogDevices,Inc.Allrightsreserved. TechnicalSupport AD8363*PRODUCTPAGEQUICKLINKS LastContentUpdate:09/27/2017 COMPARABLEPARTS Viewaparametricsearchparableparts. EVALUATIONKITS •AD8363EvaluationBoard DOCUMENTATION ApplicationNotes•AN-1040:RFPowerCalibrationImprovesPerformanceof WirelessTransmittersDataSheet•AD8363:50Hzto6GHz,50dBTruPwr™DetectorData Sheet TOOLSANDSIMULATIONS •ADIsimPLL™•ADIsimRF•AD8363S-Parameters REFERENCEMATERIALS ProductSelectionGuide•RFSourceBooklet DESIGNRESOURCES •AD8363MaterialDeclaration•PCN-PDNInformation•QualityAndReliability•SymbolsandFootprints DISCUSSIONS ViewallAD8363EngineerZoneDiscussions. SAMPLEANDBUY Visittheproductpagetoseepricingoptions. TECHNICALSUPPORT Submitatechnicalquestionorfindyourregionalsupportnumber. DOCUMENTFEEDBACK Submitfeedbackforthisdatasheet. ThispageisdynamicallygeneratedbyAnalogDevices,Inc.,andinsertedintothisdatasheet.Adynamicchangetothecontentonthispagewillnottriggerachangetoeithertherevisionnumberorthecontentoftheproductdatasheet.Thisdynamicpagemaybefrequentlymodified. AD8363 TABLEOFCONTENTS Features

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1

Applications.......................................................................................

1FunctionalBlockDiagram..............................................................1GeneralDescription.........................................................................1RevisionHistory...............................................................................2

Specifications.....................................................................................

3AbsoluteMaximumRatings............................................................7 ESDCaution..................................................................................7PinConfigurationandFunctionDescriptions.............................8TypicalPerformanceCharacteristics.............................................9TheoryofOperation......................................................................14 SquareLawDetectorandAmplitudeTarget..............................14RFInputInterface......................................................................15ChoiceofRFInputPin..............................................................15SmallSignalLoopResponse.....................................................15TemperatureSensorInterface...................................................16VREFInterface...........................................................................16TemperatureCompensationInterface.....................................16Power-DownInterface...............................................................17 REVISIONHISTORY 3/15—Rev.AtoRev.BChangestoFigure2andTable3.....................................................8ChangestoControllerModeBasicConnectionsSection.........23UpdatedOutlineDimensions.......................................................29ChangestotheOrderingGuide....................................................29 7/11—Rev.0toRev.AChangestoFeaturesSectionandApplicationsSection...............1Added3-PointCalibrationtoTable1forAllMHz......................3ReplacedTypicalPerformanceCharacteristicsSection;RenumberedSequentially................................................................9ChangestoTheoryofOperationSection....................................14ChangestoTemperatureCompensationInterfaceSection......16ChangestoSystemCalibrationandErrorCalculationSectionandChangestoFigure44andFigure45.......................19DeletedBasisforErrorCalculationsSection..............................20ChangestoFigure46......................................................................20DeletedSelectingandIncreasingCalibrationPointstoImproveuracyoveraReducedRangeSection.....................22DeletedAlteringtheSlopeSection..............................................23AddedOutputVoltageScalingSection.......................................23 5/09—Revision0:InitialVersion DataSheet VSETInterface............................................................................17OutputInterface.........................................................................17VTGTInterface..........................................................................18MeasurementModeBasicConnections..................................18SystemCalibrationandErrorCalculation..............................19Operationto125°C....................................................................19OutputVoltageScaling..............................................................20OffsetCompensation,MinimumCLPF,andMaximumCHPFCapacitanceValues.....................................................................20ChoosingaValueforCLPF..........................................................21RFPulseResponseandVTGT.................................................23ControllerModeBasicConnections.......................................23ConstantOutputPowerOperation..........................................24DescriptionofRFCharacterization.........................................25EvaluationandCharacterizationCircuitBoardLayouts......26AssemblyDrawings....................................................................28OutlineDimensions.......................................................................29OrderingGuide..........................................................................29 Rev.B|Page2of29 DataSheet AD8363 SPECIFICATIONS VPOS=5V,TA=25°
C,ZO=50Ω,single-endedinputdrive,VOUTconnectedtoVSET,VTGT=1.4V,CLPF=3.9nF,CHPF=2.7nF,errorreferredtobest-fitline(linearregression)from−20dBmto−40dBm,unlessotherwisenoted. Table1. Parameter Conditions Min OVERALLFUNCTION MaximumInputFrequency RFINPUTINTERFACE INHI(Pin14),INLO(Pin15),ac-coupled InputResistance Single-endeddrive Common-ModeDCVoltage 100MHz TCM1(Pin16)=0.47V,TCM2(Pin1)=1.0V,INHIinput OutputVoltage:HighPowerInPIN=−10dBm OutputVoltage:LowPowerInPIN=−40dBm ±1.0dBDynamicRange CWinput,TA=25°
C 3-pointcalibrationat0dBm,−10dBm,and−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC 3-pointcalibrationat0dBm,−10dBm,and−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°C6 502.6 2.470.92 64659−56 −0.2/+0.3−0.5/+0.651.7−58<±0.1<±0.1<±0.1 <±0.149−j0.09 2.20.91 6054−2−56 +0.6/−0.4+0.8/−0.651.8−58<±0.1<±0.1<±0.1 <±0.160−j3.3 Unit GHz Ω
V VV dBdBdBmdBm dBdBmV/dBdBmdBdBdB dBΩ VV dBdBdBmdBm dBdBmV/dBdBmdBdBdB dBΩ Rev.B|Page3of29 AD8363 DataSheet Parameter Conditions Min 1.9GHz TCM1(Pin16)=0.52V,TCM2(Pin1)=0.51V,INHIinput OutputVoltage:HighPowerInPIN=−15dBm OutputVoltage:LowPowerInPIN=−40dBm ±1.0dBDynamicRange CWinput,TA=25°
C 3-pointcalibrationat0dBm,−10dBm,and−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC 3-pointcalibrationat0dBm,−10dBmand−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC 3-pointcalibrationat0dBm,−10dBmand−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC 3-pointcalibrationat0dBm,−10dBmand−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC 3-pointcalibrationat0dBm,−10dBmand−40dBm Best-fit(linearregression)at−20dBmand−40dBm MaximumInputLevel,±1.0dB MinimumInputLevel,±1.0dB Deviationvs.Temperature Deviationfromoutputat25°
C −40°CC LogarithmicIntercept f=2.14GHz,−40°C≤TA≤+85°C,referredto50Ω TEMPERATURECOMPENSATIONTCM1(Pin16),TCM2(Pin1) InputVoltageRange
0 InputBiasCurrent,TCM1 VTCM1=0V VTCM1=0.5V InputResistance,TCM1 VTCM1>0.7V InputCurrent,TCM2 VTCM2=5V VTCM2=4.5V VTCM2=1V VTCM2=0V InputResistance,TCM2 0.7V≤VTCM2≤4.0V VOLTAGEREFERENCE VREF(Pin11) OutputVoltage RFIN=−55dBm TemperatureSensitivity 25°C≤TA≤70°
C 70°C≤TA≤125°
C −40°C≤TA≤+25°
C CurrentSource/SinkCapability25°C≤TA≤125°
C −40°C≤TA<+25°
C VoltageRegulation TA=25°
C,ILOAD=3mA TEMPERATUREREFERENCE TEMP(Pin8) OutputVoltage TA=25°
C,RL≥10kΩ TemperatureCoefficient −40°C≤TA≤+125°
C,RL≥10kΩ CurrentSource/SinkCapability25°C≤TA≤125°
C −40°C≤TA<+25°
C VoltageRegulation TA=25°
C,ILOAD=3mA RMSTARGETINTERFACE VTGT(Pin12) InputVoltageRange 1.4 InputBiasCurrent VTGT=1.4V InputResistance POWER-DOWNINTERFACE TCM2(Pin1) LogicLeveltoEnable VPWDNdecreasing LogicLeveltoDisable VPWDNincreasing InputCurrent VTCM2=5V VTCM2=4.5V VTCM2=1V VTCM2=0V EnableTime TCM2lowtoVOUTat1dBoffinalvalue,CLPF=470pF,CHPF=220pF,RFIN=0dBm DisableTime TCM2hightoVOUTat1dBoffinalvalue,CLPF=470pF,CHPF=220pF,RFIN=0dBm POWERSUPPLYINTERFACE VPOS(Pin3,Pin10) SupplyVoltage 4.5 QuiescentCurrent TA=25°
C,RFIN=−55dBm TA=85°
C Power-DownCurrent VTCM2>VPOS−0.3V Rev.B|Page6of29 Typ15 45 2.00.77219.2−54 −1408052750−2−3500 2.30.04−0.06−0.18 −0.6 1.45 −0.1 14100 4.24.72750−2−335 25 56072300 DataSheet Max 2.5 4/0.053/0.054/0.053/0.052.5 Unitµs nV/√Hz VVkΩdB/VdBm VµAµAkΩµAµAµAµAkΩ VmV/°CmV/°CmV/°CmAmA% VmV/°CmAmA% VµAkΩ VVµAµAµAµAµs µs 5.5
V mA mA µ
A DataSheet ABSOLUTEMAXIMUMRATINGS Table2.ParameterSupplyVoltage,VPOSInputAverageRFPower1 EquivalentVoltage,SineWaveInputInternalPowerDissipationθJC2θJB2θJA2ΨJT2ΨJB2MaximumJunctionTemperatureOperatingTemperatureRangeStorageTemperatureRangeLeadTemperature(Soldering,60sec) Rating5.5V21dBm2.51Vrms450mW10.6°C/W35.3°C/W57.2°C/W1.0°C/W34°C/W150°C−40°Cto+125°C−65°Cto+150°C300°
C 1Thisisforlongdurations.Excursionsabovethislevel,withdurationsmuchlessthan1second,arepossiblewithoutdamage. 2Noairflowwiththeexposedpadsolderedtoa4-layerJEDECboard. AD8363 StressesatorabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetotheproduct.Thisisastressratingonly;functionaloperationoftheproductattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.Operationbeyondthemaximumoperatingconditionsforextendedperiodsmayaffectproductreliability. ESDCAUTION Rev.B|Page7of29 AD8363PINCONFIGURATIONANDFUNCTIONDESCRIPTIONS DataSheet 16TCM115INLO14INHI13NC TCM2/PWDN1CHPF2VPOS3COMM4 AD8363 TOPVIEW 12VTGT11VREF10VPOS9COMM CLPF5VOUT6VSET7TEMP8 07368-002 NOTES1.NC=NOCONNECT.DONOTCONNECTTOTHISPIN.2.THEEXPOSEDPADISTHESYSTEMCOMMON CONNECTIONANDITMUSTHAVEBOTHAGOODTHERMALANDGOODELECTRICALCONNECTIONTOGROUND. Figure2.PinConfiguration Table3.PinFunctionDescriptions Pin No. MnemonicDescription
1 TCM2/PWDNThisisadualfunctionpinusedforcontrollingtheamountofnonlinearintercepttemperature compensationatvoltages<2.5Vand/orforshuttingdownthedeviceatvoltages>4V.Ifthe shutdownfunctionisnotused,thispincanbeconnectedtotheVREFpinthroughavoltage divider.
2 CHPF ConnectthispintoVPOSviaacapacitortodeterminethe−3dBpointoftheinputsignalhighpassfilter.Onlyaddacapacitorwhenoperatingatfrequenciesbelow10MHz. 3,10VPOS SupplyfortheDevice.Connectthesepinstoa5Vpowersupply.Pin3andPin10arenotinternallyconnected;therefore,bothmustconnecttothesource. 4,
9 COMM SystemCommonConnection.Connectthesepinsvialowimpedancetomon.
5 CLPF
6 VOUT
7 VSET
8 TEMP 11 VREF 12 VTGT 13 NC ConnectionforLoopFilterIntegration(Averaging)Capacitor.Connectaground-referencedcapacitortothispin.Aresistorcanbeconnectedinserieswiththiscapacitortoimproveloopstabilityandresponsetime.MinimumCLPFvalueis390pF. OutputPininMeasurementMode(ErrorAmplifierOutput).Inmeasurementmode,thispinisconnectedtoVSET.Thispincanbeusedtodriveagaincontrolwhenthedeviceisusedincontrollermode. ThevoltageappliedtothispinsetsthedecibelvalueoftherequiredRFinputvoltagethatresultsinzerocurrentflowintheloopintegratingcapacitorpin,CLPF.Thispincontrolsthevariablegainamplifier(VGA)gainsuchthata50mVchangeinVSETreducesthegainbyapproximately1dB. TemperatureSensorOutput. General-PurposeReferenceVoltageOutputof2.3V. ThevoltageappliedtothispindeterminesthetargetpowerattheinputoftheRFsquaringcircuit.Theinterceptvoltageisproportionaltothevoltageappliedtothispin.Theuseofalowertargetvoltageincreasesthecrestfactorcapacity;however,thismayaffectthesystemloopresponse. NoConnect. 14 INHI 15 INLO 16 TCM1 EPAD ThisistheRFinputpinforfrequenciesuptoandincluding2.6GHz.TheRFinputsignalisnormallyac-coupledtothispinthroughacouplingcapacitor. ThisistheRFinputpinforfrequenciesabove2.6GHz.TheRFinputsignalisnormallyac-coupledtothispinthroughacouplingcapacitor. Thispinisusedtoadjusttheinterceptpensation.ConnectthispintoVREFthroughavoltagedividerortoanexternaldcsource. ExposedPad.Theexposedpadisthemonconnectionanditmusthavebothagoodthermalandgoodelectricalconnectiontoground. EquivalentCircuitSeeFigure39 SeeFigure48 NotapplicableNotapplicableSeeFigure41 SeeFigure41 SeeFigure40 SeeFigure35SeeFigure36SeeFigure42 NotapplicableSeeFigure34 SeeFigure34 SeeFigure38 Notapplicable Rev.B|Page8of29 DataSheet AD8363 TYPICALPERFORMANCECHARACTERISTICS VPOS=5V,ZO=50Ω,single-endedinputdrive,VOUTconnectedtoVSET,VTGT=1.4V,CLPF=3.9nF,CHPF=2.7nF,TA=+25°C(black),−40°C(blue),+85°C(red),whereappropriate.Errorcalculatedusing3-pointcalibrationat0dBm,−10dBm,and−40dBm,unlessotherwiseindicated.InputRFsignalisasinewave(CW),unlessotherwiseindicated. 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-103
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure3.VOUTandLogConformancevs.InputPowerandTemperatureat100MHz 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-104
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure4.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat900MHz,CW,TypicalDevice 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-105
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure5.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat1.90GHz,CW,TypicalDevice 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-106
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure6.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat100MHz,CW 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-107
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure7.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat900MHz,CW 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-108
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure8.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat1.90GHz,CW Rev.B|Page9of29 AD8363 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-109
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure9.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat2.14GHz,CW,TypicalDevice 3.00
6 2.75
5 2.50
4 2.25
3 2.00
2 ERROR(dB) 1.75
1 VOUT(V) 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 07368-110
0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure10.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat2.6GHz,CW,TypicalDevice 3.00
6 2.75
5 2.50
4 2.25
3 ERROR(dB) OUTPUTVOLTAGE(V) 2.00
2 1.75
1 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 07368-111
0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure11.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat3.8GHz,CW,TypicalDevice DataSheet 4.0
4 3.5
3 3.0
2 2.5
1 ERROR(dB) VOUT(V) 2.0
0 1.5 –
1 1.0 –
2 0.5 –
3 07368-112
0 –60 –50 –40 –30 –20 –10
0 PIN(dBm) –410 Figure12.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat2.14GHz,CW 3.00
6 2.75
5 2.50
4 2.25
3 2.00
2 ERROR(dB) VOUT(V) 1.75
1 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 07368-113
0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure13.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat2.6GHz,CW 3.00
6 2.75
5 2.50
4 2.25
3 ERROR(dB) OUTPUTVOLTAGE(V) 2.00
2 1.75
1 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 07368-114
0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure14.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat3.8GHz,CW Rev.B|Page10of29 DataSheet 3.00
6 2.75
5 2.50
4 2.25
3 ERROR(dB) OUTPUTVOLTAGE(V) 2.00
2 1.75
1 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 07368-115
0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure15.VOUTandLogConformanceErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat5.8GHz,TypicalDevice
3 ERRORCW ERRORW-CDMA1CARTM164DPCH
2 ERRORW-CDMA2CARTM164DPCH ERRORW-CDMA3CARTM164DPCH ERRORW-CDMA4CARTM164DPCH
1 0 ERROR(dB) –
1
2 07368-026 –
3 –60 –50 –40 –30 –20 –10
0 10 PIN(dBm) Figure16.ErrorfromCWLinearReferencevs.InputAmplitudewithModulation,Frequencyat2.14GHz,CLPF=0.1μ
F,INHIInput 100MHz900MHz1.9GHz 5.8GHz3.8GHz 2.14GHz2.6GHz Figure17.Single-EndedInputImpedance(S11)vs.Frequency;ZO=50Ω,INHIorINLO 07368-030 AD8363 3.00
6 2.75
5 2.50
4 2.25
3 ERROR(dB) OUTPUTVOLTAGE(V) 2.00
2 1.75
1 1.50
0 1.25 –
1 1.00 –
2 0.75 –
3 0.50 –
4 0.25 –
5 0 –60 –50 –40 –30 –20 –10
0 PIN
(dBm) –610 Figure18.DistributionofVOUTandErrorwithRespectto25°CIdealLineoverTemperaturevs.InputAmplitudeat5.8GHz,CW
3 2 07368-118
1 ERROR(dB)
0
1 CW W-CDMA1CARTM132DPCH QPSK –
2 256QAM WIMAX256SUBCR,64QAM,10MHzBW CDMA2K9CHSR14CAR –
3 –60 –50 –40 –30 –20 –10
0 10 PIN(dBm) 07368-028 Figure19.ErrorfromCWLinearReferencevs.InputAmplitudewithModulation,Frequencyat2.6GHz,CLPF=0.1μ
F,INHIInput 160 140 120 100 80 60 40 20
0 100 1k 10k 100k 1M 10M FREQUENCY(Hz) NOISESPECTRALDENSITY(nV/Hz) 07368-031 Figure20.TypicalNoiseSpectralDensityofVOUT;AllCLPFValues Rev.B|Page11of29 VOUT(V) 07368-033 VOUT(V) AD8363 5.00dBm–10dBm–20dBm–30dBm–40dBm 4.5 4.0 3.5 RF 3.0 ENVELOPE 2.5 2.0 1.5 1.0 0.5
0 –0.5 –1.0–2–1012345678910111213141516 TIME(µs) Figure21.OutputResponsetoRFBurstInput,CarrierFrequencyat2.14GHz,CLPF=390pF,CHPF=Open,RisingEdge 5.0 4.5 4.0 RF 3.5 ENVELOPE 3.0 2.5 VOUT(V) 2.0 1.5 1.0 0.5
0 –0.5 0dBm–10dBm–20dBm –30dBm –40dBm –1.0 –
1 0
1 2
3 4
5 TIME(ms) 07368-034 Figure22.OutputResponsetoRFBurstInput,CarrierFrequencyat2.14GHz,CLPF=0.1µ
F,CHPF=Open,RisingEdge
6 6 OUTPUTVOLTAGE,VOUT(V)VTCM2(V) 5TCM2LOW 4
3 3TCM2HIGH 0 0dBm
2 –50–25 0255075100125150175200225250275300325350375400425450475500525550575600 07368-037 1–50dBm
0 TIME(µs) Figure23.OutputResponseUsingPower-DownModeforVariousRFInputLevelsCarrierFrequencyat2.14GHz,CLPF=470pF,CHPF=220pF DataSheet 5.0 0dBm–10dBm–20dBm–30dBm–40dBm4.5 4.0 RF 3.5 ENVELOPE 3.0 2.5 2.0 1.5 1.0 0.5
0 –0.5 07368-035 –1.0–2024681012141618202224262830 TIME(µs) Figure24.OutputResponsetoRFBurstInput,CarrierFrequencyat2.14GHz,CLPF=390pF,CHPF=Open,FallingEdge 5.0 0dBm–10dBm–20dBm 4.5 –30dBm –40dBm 4.0 RF 3.5 ENVELOPE 3.0 2.5 VOUT(V) 2.0 1.5 1.0 0.5
0 –0.5 07368-036 –1.0 –
1 0
1 2
3 4 TIME(ms) Figure25.OutputResponsetoRFBurstInput,CarrierFrequencyat2.14GHz,CLPF=0.1µ
F,CHPF=Open,FallingEdge 2.00
4 1.75
3 1.50
2 1.25
1 ERROR(°C) VTEMP(V) 1.00
0 0.75 –
1 0.50 –
2 0.25 –
3 07368-027
0
4 –50–40–30–20–100102030405060708090100110120130 TEMPERATURE(°C) Figure26.VTEMPandErrorwithRespecttoStraightLinevs.TemperatureforElevenDevices Rev.B|Page12of29 DataSheet QUANTITY REPRESENTS APPROXIMATELY 800 3000PARTSFROM SIXLOTS 600 400 200
0 1.34 1.36 1.38 1.40 1.42 1.44 1.46 VTEMP(V) Figure27.DistributionofVTEMPVoltageat25oC,NoRFInput 100VTCM2INCREASING 10 VTCM2DECREASING SUPPLYCURRENT(mA)
1 0.14.04.14.24.34.44.54.64.74.84.95.0VTCM2(V) Figure28.SupplyCurrentvs.VTCM2 2.34 2.33 2.32 2.31 2.30 2.29 2.28 2.27 2.26 –30–25–20–15–10–
5 0 PIN(dBm)
5 10 Figure29.ChangeinVREFwithInputAmplitudeforElevenDevices VREF(V) 07368-049 VREF(V) 07368-051 VREF(V) 07368-077 QUANTITY AD8363 07368-029 600REPRESENTSAPPROXIMATELY3000PARTSFROM 500SIXLOTS 400 300 200 100
0 2.24 2.26 2.28 2.30 2.32 2.34 2.36 VREF(V) Figure30.DistributionofVREF,25°
C,NoRFInput 2.3202.3182.3162.3142.3122.3102.3082.3062.3042.3022.300 4.54.64.74.84.95.05.15.25.35.45.5VPOS(V) Figure31.ChangeinVREFwithVPOSforNineDevices 2.3252.320 2.3152.3102.3052.300 2.295 2.290 –40–20
0 20 40 60 80100120 TEMPERATURE(°C) Figure32.ChangeinVREFwithTemperatureforElevenDevices 07368-038 07368-048 Rev.B|Page13of29 AD8363 DataSheet THEORYOFOPERATION putationalcoreoftheAD8363isahighperformanceAGCloop.AsshowninFigure33,theAGCprisesawidebandwidthvariablegainamplifier(VGA),squarelawdetectors,anamplitudetargetcircuit,andanoutputdriver.Foramoredetaileddescriptionofthefunctionalblocks,seetheAD8362datasheet. Thenomenclatureusedinthisdatasheettodistinguishbetweenapinnameandthesignalonthatpinisasfollows: Thepinnameisalluppercase(forexample,VPOS,COMM,andVOUT). Thesignalnameoravalueassociatedwiththatpinisthepinmnemonicwithapartialsubscript(forexample,CLPF,CHPF,andVOUT). SQUARELAWDETECTORANDAMPLITUDETARGET TheVGAgainhastheform GSET=GOexp(−VSET/VGNS)
(1) where:GOisthebasicfixedgain.VGNSisascalingvoltagethatdefinesthegainslope(thedecibelchangepervoltage).ThegaindecreaseswithincreasingVSET. TheVGAoutputis VSIG=GSET×RFIN=GO×RFINexp(VSET/VGNS)
(2) whereRFINistheacvoltageappliedtotheinputterminalsoftheAD8363. TheoutputoftheVGA,VSIG,isappliedtoawidebandsquarelawdetector.ThedetectorprovidesthetruermsresponseoftheRFinputsignal,independentofwaveform.Thedetectoroutput,ISQR,isafluctuatingcurrentwithpositivemeanvalue.ThedifferencebetweenISQRandaninternallygeneratedcurrent,ITGT,isintegratedbyCFandtheexternalcapacitorattachedtotheCLPFpinatthesummingnode.CFisanon-chip25pFfiltercapacitor,andCLPF,theexternalcapacitanceconnectedtotheCLPFpin,canbeusedtoarbitrarilyincreasetheaveragingtimewhiletradingoffwiththeresponsetime.WhentheAGCloopisatequilibrium Mean(ISQR)=ITGT
(3) Thisequilibriumursonlywhen Mean(VSIG2) = V2TGT
(4) whereVTGTisthevoltagepresentedattheVTGTpin.ThispincanconvenientlybeconnectedtotheVREFpinthroughavoltagedividertoestablishatargetrmsvoltageVATGof~70mVrms,whenVTGT=1.4V. Becausethesquarelawdetectorsareelectricallyidenticalandwellmatched,processandtemperaturedependentvariationsareeffectivelycancelled. CHPF INHIINLO VSET VGAGSETVPOS VSIG SUMMINGNODE VTGTVATG=20 ISQRX2 ITGTX2 CLPF(EXTERNAL) CF(INTERNAL) CH(INTERNAL) CHPF(EXTERNAL) TEMPERATURECOMPENSATIONANDBIAS TEMPERATURESENSOR BANDGAPREFERENCE Figure33.SimplifiedArchitectureDetails VTGT CLPFVOUTCOMMTCM1TCM2/PWDNTEMP(1.4V)VREF(2.3V) 07368-076 Rev.B|Page14of29 DataSheet ByforcingthepreviousidentitythroughvaryingtheVGAsetpoint,itisapparentthat RMS(VSIG)=√(Mean(VSIG2))=√(VATG2)=VATG
(5) SubstitutingthevalueofVSIGfromEquation2resultsin RMS(G0×RFINexp(−VSET/VGNS))=VATG
(6) Whenconnectedasameasurementdevice,VSET=VOUT.SolvingforVOUTasafunctionofRFIN VOUT=VSLOPE×log10(RMS(RFIN)/VZ)
(7) where:VSLOPEis1V/decade(or50mV/dB).VZistheinterceptvoltage. WhenRMS(RFIN)=VZ,becauselog10
(1)=0,thisimpliesthatVOUT=0V,makingtheintercepttheinputthatforcesVOUT=0V.VZhasbeenfixedtoapproximately280μV(approximately−58dBm,referredto50Ω)withaCWsignalat100MHz.Inreality,theAD8363doesnotrespondtosignalslessthan~−56dBm.Thismeansthattheinterceptisanextrapolatedvalueoutsidetheoperatingrangeofthedevice. Ifdesired,theeffectivevalueofVSLOPEcanbealteredbyusingaresistordividerbetweenVOUTandVSET.(RefertotheOutputVoltageScalingsectionformoreinformation.) Inmostapplications,theAGCloopisclosedthroughthesetpointinterfaceandtheVSETpin.Inmeasurementmode,VOUTisdirectlyconnectedtoVSET.(SeetheMeasurementModeBasicConnectionssectionformoreinformation.)Incontrollermode,acontrolvoltageisappliedtoVSETandtheVOUTpintypicallydrivesthecontrolinputofanamplificationorattenuationsystem.Inthiscase,thevoltageattheVSETpinforcesasignalamplitudeattheRFinputsoftheAD8363thatbalancesthesystemthroughfeedback.(SeetheControllerModeBasicConnectionssectionformoreinformation.) RFINPUTINTERFACE Figure34showstheconnectionsoftheRFinputswithintheAD8363.Theinputimpedanceissetprimarilybyaninternal50ΩresistorconnectedbetweenINHIandINLO.Adclevelofapproximatelyhalfthesupplyvoltageoneachpinisestablishedinternally.EithertheINHIpinortheINLOpincanbeusedasthesingle-endedRFinputpin.(SeetheChoiceofRFInputPinsection.)Ifthedclevelsatthesepinsaredisturbed,performancepromised;therefore,signalcouplingcapacitorsmustbeconnectedfromtheinputsignaltoINHIandINLO.Theinputsignalhigh-passcornerformedbythecouplingcapacitorsandtheinternalresistancesis fHIGH-PASS=1/(2×π×50×C)
(8) whereCisinfaradsandfHIGH-PASSisinhertz.Theinputcouplingcapacitorsmustbelargeenoughinvaluetopasstheinputsignalfrequencyofinterest.TheotherinputpinshouldbeRFac-coupledmon(ground). AD8363 VPOS VBIAS ESD2.5kΩ 2.5kΩ ESD INHI 50Ω INLO ESD ESDESDESDESDESDESD ESDESDESDESDESDESD 07368-039 ESD ESD Figure34.RFInputsSimplifiedSchematic ExtensiveESDprotectionisemployedontheRFinputs,whichlimitsthemaximumpossibleinputamplitudetotheAD8363. CHOICEOFRFINPUTPIN ThedynamicrangeoftheAD8363canbeoptimizedbychoosingthecorrectRFinputpinfortheintendedfrequencyofoperation.UsingINHI(Pin14),userscanobtainthebestdynamicrangeatfrequenciesupto2.6GHz.Above2.6GHz,itismendedthatINLO(Pin15)beused.At2.6GHz,theperformanceobtainedatthetwoinputsisapproximatelyequal. TheAD8363wasdesignedwithasingle-endedRFdriveinmind.AbaluncanbeusedtodriveINHIandINLOdifferentially,butitisnotnecessary,anditdoesnotresultinimproveddynamicrange. SMALLSIGNALLOOPRESPONSE TheAD8363usesaVGAinalooptoforceasquaredRFsignaltobeequaltoasquareddcvoltage.Thisnonlinearloopcanbesimplifiedandsolvedforasmallsignalloopresponse.Thelowpasscornerpoleisgivenby FreqLP≈1.83×ITGT/(CLPF)
(9) where:ITGTisinamperes.CLPFisinfarads.FreqLPisinhertz. ITGTisderivedfromVTGT;however,ITGTisasquaredvalueofVTGTmultipliedbyatransresistance,namely ITGT = gm × V2TGT (10) gmisapproximately18.9μs,sowithVTGTequaltothetypicallymended1.4V,ITGTisapproximately37μ
A.Thevalueofthiscurrentvarieswithtemperature;therefore,thesmallsignalpolevarieswithtemperature.However,becausetheRFsquaringcircuitanddcsquaringcircuittrackwithtemperature,thereisnotemperaturevariationcontributiontotheabsolutevalueofVOUT. ForCWsignals, FreqLP≈67.7×10−6/(CLPF) (11) However,signalswithlargecrestfactorsincludelowpseudorandomfrequencycontentthateitherneedstobefilteredoutorsampledandaveragedout.SeetheChoosingaValueforCLPFsectionformoreinformation. Rev.B|Page15of29 AD8363 DataSheet TEMPERATURESENSORINTERFACE TheAD8363providesatemperaturesensoroutputwithanoutputvoltagescalingfactorofapproximately5mV/°
C.Theoutputiscapableofsourcing4mAandsinking50μAmaximumattemperaturesatorabove25°
C.Ifadditionalcurrentsinkcapabilityisdesired,anexternalresistorcanbeconnectedbetweentheTEMPandCOMMpins.Thetypicaloutputvoltageat25°Cisapproximately1.4V. VPOS INTERNALVPAT 12kΩTEMP 4kΩ 07368-041 COMM Figure35.TEMPInterfaceSimplifiedSchematic VREFINTERFACE TheVREFpinprovidesaninternallygeneratedvoltagereference.TheVREFvoltageisatemperaturestable2.3Vreferencethatiscapableofsourcing4mAandsinking50μAmaximumattemperaturesatorabove25°
C.AnexternalresistorcanbeconnectedbetweentheVREFandCOMMpinstoprovideadditionalcurrentsinkcapability.ThevoltageonthispincanbeusedtodrivetheTCM1,TCM2/PWDN,andVTGTpins,ifdesired. VPOS INTERNALVOLTAGE VREF ThevaluesinTable4werechosentogivethebestdriftperformanceatthehighendoftheusabledynamicrangeoverthe−40°Cto+85°Ctemperaturerange. CompensatingthedeviceforthetemperaturedriftusingTCM1andTCM2/PWDNallowsforgreatflexibilityandtheusermaywishtomodifythesevaluestooptimizeforanotheramplitudepointinthedynamicrange,foradifferenttemperaturerange,orforanoperatingfrequencyotherthanthoseshowninTable4. Tofindapensationpoint,VTCM1andVTCM2canbesweptwhilemonitoringVOUToverthetemperatureatthefrequencyandamplitudeofinterest.TheoptimalvoltagesforVTCM1andVTCM2toachieveminimumtemperaturedriftatagivenpowerandfrequencyarethevaluesofVTCM1andVTCM2whereVOUThasminimummovement.SeetheAD8364andADL5513datasheetsformoreinformation. VaryingVTCM1andVTCM2hasonlyaveryslighteffectonVOUTatdevicetemperaturesnear25°C;however,pensationcircuithasmoreandmoreeffect,andismoreandmorenecessaryforbesttemperaturedriftperformance,asthetemperaturedepartsfartherfrom25°
C. Figure37showstheeffectontemperaturedriftperformanceat25°Cand85°CasVTCM1isvariedbutVTCM2isheldconstantat0.6V. 3 2VTCM1=0.62V 1
0 07368-042 ERROR(dB) 16kΩCOMM –
1 VTCM1=0.42V 25°
C 85°
C
2 Figure36.VREFInterfaceSimplifiedSchematic TEMPERATURECOMPENSATIONINTERFACE ProprietarytechniquesareusedtomaximizethetemperaturestabilityoftheAD8363.Foroptimalperformance,theoutputtemperaturedriftmustpensatedforusingtheTCM1andTCM2/PWDNpins.TheabsolutevaluepensationvarieswithfrequencyandVTGT.Table4showsthemendedvoltagesfortheTCM1andTCM2/PWDNpinstomaintainthebesttemperaturedrifterrorovertheratedtemperaturerange(−40°C3 –60 –50 –40 –30 –20 –10
0 10 RFIN(dBm) Figure37.Errorvs.InputAmplitudeoverSteppedVTCM1Values,25oCand85oC,2.14GHz,VTCM2=0.6V TCM1primarilyadjuststheinterceptoftheAD8363attemperature.Inthisway,TCM1canbethoughtofasacoarseadjustmenttopensation.Conversely,TCM2performsafineadjustment.Forthisreason,itisadvisedthatwhensearchingpensationwithVTCM1andVTCM2,thatVTCM1beadjustedfirst,andwhenbestperformanceisfound,VTCM2canthenbeadjustedforoptimization. ItisevidentfromFigure37thatthepensationcircuitcanbeusedtoadjustforthelowestdriftatanyinputamplitudeofchoice.ThoughnotshowninFigure37,asimilaranalysiscansimultaneouslybeperformedat−40°C,oranyothertemperaturewithintheoperatingrangeoftheAD8363. Performancevariesslightlyfromdevicetodevice;therefore,optimalVTCM1andVTCM2valuesmustbearrivedatstatistically Rev.B|Page16of29 DataSheet overapopulationofdevicestobeusefulinmassproductionapplications. TheTCM1andTCM2pinshavehighinputimpedances,approximately5kΩand500kΩ,respectively,andcanbeconvenientlydrivenfromanexternalsourceorfromafractionofVREFbyusingaresistordivider.VREFdoeschangeslightlywithtemperatureandRFinputamplitude(seeFigure32andFigure29);however,theamountofchangeisunlikelytoresultinasignificanteffectonthefinaltemperaturestabilityoftheRFmeasurementsystem. Figure38showsasimplifiedschematicrepresentationofTCM1.SeethePower-DownInterfacesectionfortheTCM2interface. VPOS ESD3kΩ ESDTCM1 3kΩESD 07368-043 COMM Figure38.TCM1InterfaceSimplifiedSchematic POWER-DOWNINTERFACE ThequiescentanddisabledcurrentsfortheAD8363at25°Careapproximately60mAand300μA,respectively.Thedualfunctionpin,TCM2/PWDN,isconnectedtoapensationcircuitaswellasapower-downcircuit.Typically,whenPWDNisgreaterthanVPOS−0.1V,thedeviceisfullypowereddown.Figure28showsthischaracteristicasafunctionofVPWDN.NotethatbecauseofthedesignofthissectionoftheAD8363,asVTCM2passesthroughanarrowrangeat~4.5V(or~VPOS−0.5V),theTCM2/PWDNpinsinksapproximately750μ
A.ThesourceusedtodisabletheAD8363musthaveasufficientlyhighcurrentcapabilityforthisreason.Figure23showsthetypicalresponsetimesforvariousRFinputlevels.Theoutputreacheswithin0.1dBofitssteady-statevalueinapproximately35μs;however,thereferencevoltageisavailabletofulluracyinamuchshortertime.Thiswake-upresponsevariesdependingontheinputcouplingandthecapacitances,CHPFandCLPF. VPOS TCM2/PWDN COMM ESD SHUTDOWNCIRCUIT 200Ω POWER-UPCIRCUIT 7kΩ200Ω ESD7kΩ VREF ESD 200Ω INTERCEPTTEMPERATURECOMPENSATION Figure39.PWDNInterfaceSimplifiedSchematic 07368-044 AD8363 VSETINTERFACE TheVSETinterfacehasahighinputimpedanceof72kΩ.ThevoltageatVSETisconvertedtoaninternalcurrentusedtosettheinternalVGAgain.TheVGAattenuationcontrolisapproximately19dB/V. GAINADJUSTVSET54kΩ 18kΩ 2.5kΩ 07368-045 COMM Figure40.VSETInterfaceSimplifiedSchematic OUTPUTINTERFACE TheoutputdriverusedintheAD8363isdifferentfromtheoutputstageontheAD8362.TheAD8363incorporatesrail-torailoutputdriverswithpull-upandpull-downcapabilities.Theclosed-loop−3dBbandwidthoftheVOUTbufferwithnoloadisapproximately58MHzwithasingle-poleroll-offof−20dB/dec.Theoutputnoiseisapproximately45nV/√Hzat100kHz,whichisindependentofCLPFduetothearchitectureoftheAD8363.VOUTcansourceandsinkupto10mA.ThereisaninternalloadbetweenVOUTandCOMMof2.5kΩ. VPOS CLPF ESD2pF ESD VOUT2kΩ ESD 500Ω COMM Figure41.VOUTInterfaceSimplifiedSchematic 07368-046 Rev.B|Page17of29 AD8363 DataSheet VTGTINTERFACE ThetargetvoltagecanbesetwithanexternalsourceorbyconnectingtheVREFpin(nominally2.3V)totheVTGTpinthrougharesistivevoltagedivider.With1.4VontheVTGTpin,thermsvoltagethatmustbeprovidedbytheVGAtobalancetheAGCfeedbackloopis1.4V×0.05=70mVrms.MostofthecharacterizationinformationinthisdatasheetwascollectedatVTGT=1.4V.Voltageshigherandlowerthanthiscanbeused;however,doingsoincreasesordecreasesthegainattheinternalsquaringcell,whichresultsinacorrespondingincreaseordecreaseinintercept.Thisinturnaffectsthesensitivityandtheusablemeasurementrange.Becausethegainofthesquaringcellvarieswithtemperature,oscillationsoralossinmeasurementrangecanresult.Forthesereasons,donotreduceVTGTbelow1.3V. VPOS VTGT ESD50kΩ g×X2ITGT 07368-047 ESDESD50kΩ 10kΩ COMM Figure42.VTGTInterfaceSimplifiedSchematic R111.4kΩ MEASUREMENTMODEBASICCONNECTIONS TheAD8363requiresasinglesupplyofnominally5V.Thesupplyisconnectedtothetwosupplypins,VPOS.DecouplethepinsusingtwocapacitorswithvaluesequalorsimilartothoseshowninFigure43.Thesecapacitorsmustprovidealowimpedanceoverthefullfrequencyrangeoftheinput,andtheyshouldbeplacedascloseaspossibletotheVPOSpins.Usetwodifferentcapacitorvaluesinparalleltoprovideabroadbandacshorttoground. Inputsignalscanbeapplieddifferentiallyorsingle-ended;however,inbothcases,theinputimpedanceis50Ω.Mostperformanceinformationinthisdatasheetwasderivedwithasingle-endeddrive.TheoptimalmeasurementrangeisachievedusingasingleendeddriveontheINHIpinatfrequenciesbelow2.6GHz(asshowninFigure43),andlikewise,optimalperformanceisachievedusingtheINLOpinabove2.6GHz(similartoFigure43;exceptINLOisac-coupledtotheinputandINHIisac-coupledtoground). TheAD8363isplacedinmeasurementmodebyconnectingVOUTtoVSET.ThisclosestheAGCloopwithinthedevicewithVOUTrepresentingtheVGAcontrolvoltage,whichisrequiredtopresentthecorrectrmsvoltageattheinputoftheinternalsquarelawdetector. VPOS2 VREF C70.1µ
F R10845Ω C5100pF 1211109 TEMP VTGTVREFVPOSCOMM LOWFREQUENCYINPUT C100.1µ
F C120.1µFTCM1 13NC14INHI15INLO16TCM1 AD8363

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