OctalLNA/VGA/AAF/14-BitADCandCWI/QDemodulatorAD9277
FEATURES
8channelsofLNA,VGA,AAF,ADC,andI/QdemodulatorLownoisepreamplifier(LNA)
Input-referrednoise:0.75nV/√Hztypicalat5MHz(gain=21.3dB)
SPI-programmablegain:15.6dB/17.9dB/21.3dBSingle-endedinput:VINmaximum=733mVp-p/
550mVp-p/367mVp-pDual-modeactiveinputimpedancematchingBandwidth(BW)>100MHzFull-scale(FS)output:4.4Vp-pdifferentialVariablegainamplifier(VGA)Attenuatorrange:−42dBto0dBPostampgain:21dB/24dB/27dB/30dBLinear-in-dBgaincontrolAntialiasingfilter(AAF)Programmablesecond-orderLPFfrom8MHzto18MHzProgrammableHPFAnalog-to-digitalconverter(ADC)14bitsat10MSPSto50MSPSSNR:73dBSFDR:75dBSerialLVDS(ANSI-644,IEEE1596.3reducedrangelink)DataandframeclockoutputsCWmodeI/QdemodulatorIndividualprogrammablephaserotationOutputdynamicrangeperchannel>160dBFS/√HzLowpower:207mWperchannelat14bits/50MSPS(TGC),94mWperchannelforCWDopplerFlexiblepower-downmodesOverloadrecoveryin<10nsFastrecoveryfromlowpowerstandbymode:<2μs100-leadTQFP_EP
APPLICATIONS
Medicalimaging/ultrasoundAutomotiveradar
PRODUCTHIGHLIGHTS
1.SmallFootprint.Eightchannelsarecontainedinasmall,space-savingpackage.FullTGCpath,ADC,andI/Qdemodulatorcontainedwithina100-lead,16mm×16mmTQFP.
2.LowPower.InTGCmode,lowpowerof207mWperchannelat50MSPS.InCWmode,ultralowpowerof94mWperchannel.
3.IntegratedHighDynamicRangeI/QDemodulatorwithPhaseRotation.
4.EaseofUse.Adataclockoutput(DCO±)operatesupto480MHzandsupportsdoubledatarate(DDR)operation.
5.UserFlexibility.Serialportinterface(SPI)controloffersawiderangeofflexiblefeaturestomeetspecificsystemrequirements.
6.IntegratedSecond-OrderAntialiasingFilter.ThisfilterisplacedbeforetheADCandisprogrammablefrom8MHzto18MHz. FUNCTIONALBLOCKDIAGRAM AVDD1AVDD2PDWNSTBY DRVDD LO-ATOLO-
H LOSW-ATOLOSW-HLI-ATOLI-
H LG-ATOLG-
H LNA I/QDEMODULATOR VGA AAF 8CHANNELS 14-BITADC SERIALLVDS DOUTA+TODOUTH+DOUTA–TODOUTH– LOGENERATION REFERENCE SERIALPORTINTERFACE DATARATEMULTIPLIER FCO+FCO–DCO+DCO– RESET4LO+4LO– GAIN+GAIN– CWI–CWI+CWQ–CWQ+VREFRBIASGPO[0:3]CSBSCLKSDIOCLK+CLK– 08181-001 Figure1. Rev.0 InformationfurnishedbyAnalogDevicesisbelievedtobeurateandreliable.However,noresponsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorotherrightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. OneTechnologyWay,
P.O.Box9106,Norwood,MA02062-9106,
U.S.A. Tel:781.329.4700 Fax:781.461.3113 ©2009AnalogDevices,Inc.Allrightsreserved. AD9277*PRODUCTPAGEQUICKLINKS LastContentUpdate:02/23/2017 COMPARABLEPARTS Viewaparametricsearchparableparts. EVALUATIONKITS •AD9277EvaluationBoard DOCUMENTATION DataSheet•AD9277:OctalLNA/VGA/AAF/ADCandCWI&
Q DemodulatorDataSheetUserGuides•UG-016:EvaluationBoardUserGuide TOOLSANDSIMULATIONS •VisualAnalog•AD9277IBISModels REFERENCEMATERIALS Press•Industry’sFirstOctalUltrasoundReceiverwithDigitalI/Q DemodulatorandDecimationFilterReducesProcessorOverheadinUltrasoundSystems•LowCost,OctalUltrasoundReceiverwithOn-ChipRFDecimatorandJESD204BSerialInterfaceTechnicalArticles•MS-2210:DesigningPowerSuppliesforHighSpeedADC DESIGNRESOURCES •AD9277MaterialDeclaration•PCN-PDNInformation•QualityAndReliability•SymbolsandFootprints DISCUSSIONS ViewallAD9277EngineerZoneDiscussions. SAMPLEANDBUY Visittheproductpagetoseepricingoptions. TECHNICALSUPPORT Submitatechnicalquestionorfindyourregionalsupportnumber. DOCUMENTFEEDBACK Submitfeedbackforthisdatasheet. ThispageisdynamicallygeneratedbyAnalogDevices,Inc.,andinsertedintothisdatasheet.Adynamicchangetothecontentonthispagewillnottriggerachangetoeithertherevisionnumberorthecontentoftheproductdatasheet.Thisdynamicpagemaybefrequentlymodified. AD9277 TABLEOFCONTENTS Features
4 ACSpecifications..........................................................................4DigitalSpecifications...................................................................7SwitchingSpecifications..............................................................8ADCTimingDiagrams...............................................................9AbsoluteMaximumRatings..........................................................10ThermalImpedance...................................................................10ESDCaution................................................................................10PinConfigurationandFunctionDescriptions...........................11TypicalPerformanceCharacteristics...........................................14TGCMode...................................................................................14CWDopplerMode.....................................................................17EquivalentCircuits.........................................................................19TheoryofOperation......................................................................21 REVISIONHISTORY 7/09—Revision0:InitialVersion Ultrasound..................................................................................21ChannelOverview.....................................................................22InputOverdrive..........................................................................25CWDopplerOperation.............................................................25TGCOperation...........................................................................29ADC
C. Rev.0|Page3of48 AD9277 SPECIFICATIONS ACSPECIFICATIONS AVDD1=1.8V,AVDD2=3.0V,DRVDD=1.8V,1.0VinternalADCreference,fIN=5MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,PGAgain=24dB,GAIN−=0.8V,AAFLPFcutoff=fSAMPLE/4.5,HPFcutoff=LPFcutoff/20.7(default),fSAMPLE=50MSPS(Register0x02=0x01),fulltemperature,ANSI-644LVDSmode,unlessotherwisenoted. Table1. Parameter1 TestConditions/Comments Min LNACHARACTERISTICS Gain Single-endedinputtodifferentialoutput Single-endedinputtosingle-endedoutput InputVoltageRange(Single-Ended) LNAoutputlimitedto4.4Vp-pdifferentialoutput LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB InputCommonMode(LI-x,LG-x) OutputCommonMode(LO-x) OutputCommonMode(LOSW-x)Switchoff Switchon InputResistance(LI-x) RFB=250Ω RFB=500Ω RFB=∞ InputCapacitance(LI-x) −3dBBandwidth InputNoiseVoltage RS=0Ω,RFB=∞ LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB InputNoiseCurrent RFB=∞ 1dBInputCompressionPoint GAIN+=0V LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB NoiseFigure RS=50Ω ActiveTerminationMatched LNAgain=15.6dB,RFB=200Ω LNAgain=17.9dB,RFB=250Ω LNAgain=21.3dB,RFB=350Ω Unterminated LNAgain=15.6dB,RFB=∞ LNAgain=17.9dB,RFB=∞ LNAgain=21.3dB,RFB=∞ FULL-CHANNEL(TGC)CHARACTERISTICS AAFLow-PassCutoff InRange −3dB,programmable
8 InRangeAAFBandwidthTolerance GroupDelayVariation f=1MHzto18MHz,GAIN+=0Vto1.6V Input-ReferredNoiseVoltage GAIN+=1.6V,RFB=∞ LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB Typ Max 15.6/17.9/21.39.6/11.9/15.3 7335503671.01.5High-Z1.5501001522100 0.980.860.751 1.00.80.5 4.84.13.23.42.82.3 18±10 ±2 1.261.040.85 Unit dBdB mVp-pmVp-pmVp-pVVΩVΩΩkΩpFMHz nV/√HznV/√HznV/√HzpA/√Hz Vp-pVp-pVp-p dBdBdBdBdBdB MHz% ns nV/√HznV/√HznV/√Hz Rev.0|Page4of48 Parameter1NoiseFigureActiveTerminationMatched Unterminated CorrelatedNoiseRatioOutputOffsetSignal-to-NoiseRatio(SNR) HarmonicDistortionSecondHarmonic ThirdHarmonic Two-ToneIntermodulation(IMD3) Channel-to-ChannelCrosstalk Channel-to-ChannelDelayVariation PGAGainGAINACCURACY GainLawConformanceError LinearGainErrorChannel-to-ChannelMatchingGAINCONTROLINTERFACENormalOperatingRangeGainRangeScaleFactorResponseTimeGAIN+ImpedanceGAIN−ImpedanceCWDOPPLERMODELOFrequencyPhaseIncrementOutputDCBias(Single-Ended)MaximumOutputSwing Transconductance(Differential) Input-ReferredNoiseVoltage TestConditions/CommentsGAIN+=1.6V,RS=50ΩLNAgain=15.6dB,RFB=200ΩLNAgain=17.9dB,RFB=250ΩLNAgain=21.3dB,RFB=350ΩLNAgain=15.6dB,RFB=∞LNAgain=17.9dB,RFB=∞LNAgain=21.3dB,RFB=∞Nosignal,correlated/uncorrelated fIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6V fIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6VfIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6VfRF1=5.015MHz,fRF2=5.020MHz,ARF1=0dB,ARF2=−20dB,GAIN+=1.6V,IMD3relativetoARF2fIN=5MHzat−1dBFSOverrangecondition2FullTGCpath,fIN=5MHz,GAIN+=0Vto1.6V Differentialinputtodifferentialoutput25°C0−650.321/24/27/30
1.5−2.50.1
28.57501070
22.51.5
+1.5+1.51.60
10±1.25
dBdBDegrees
dB
dBdBdBdBdB
VdBdB/VnsMΩkΩ
MHzDegreesVmA
1.8
mA/V
2.4
mA/V
3.5
mA/V
1.5
nV/√Hz
1.4
nV/√Hz
1.3
nV/√Hz
Rev.0|Page5of48
AD9277
Parameter1
TestConditions/Comments
Min
NoiseFigure
RS=50Ω,RFB=∞
LNAgain=15.6dB
LNAgain=17.9dB
LNAgain=21.3dB
Input-ReferredDynamicRange
RS=0Ω,RFB=∞
LNAgain=15.6dB
LNAgain=17.9dB
LNAgain=21.3dB
Output-ReferredSNR
−3dBFSinput,fRF=2.5MHz,f4LO=10MHz,1kHzoffset
Two-ToneIntermodulation(IMD3)
fRF1=5.015MHz,fRF2=5.020MHz,f4LO=20MHz,ARF1=0dB,ARF2=−20dB,IMD3relativetoARF2
QuadraturePhaseError
ItoQ,allphases,1σ
I/QAmplitudeImbalance
ItoQ,allphases,1σ
Channel-to-ChannelMatching
PhaseItoI,QtoQ,1σ
AmplitudeItoI,QtoQ,1σ
POWERSUPPLY
AVDD1
1.7
AVDD2
2.7
DRVDD
1.7
IAVDD1
TGCmode
CWDopplermode
IAVDD2
TGCmode,nosignal
CWDopplermodeperchannelenabled,nosignal
IDRVDD
TotalPowerDissipation(IncludingOutputDrivers)
TGCmode,nosignal
CWDopplermodewitheightchannelsenabled,nosignal
Power-DownDissipation
StandbyPowerDissipation
PowerSupplyRejectionRatio(PSRR)
ADCRESOLUTION
ADCREFERENCE
OutputVoltageError
VREF=1V
LoadRegulationat1.0mA
VREF=1V
InputResistance
Typ
5.75.34.8
164162160155
−58
0.150.0150.50.25
1.83.01.82651536530
511660
750
1.6
14
26
Max
1.93.61.9
19305200±20
Unit
dBdBdB
dBFS/√HzdBFS/√HzdBFS/√HzdBc/√Hz
dB
DegreesdBDegreesdB
VVVmAmAmAmA
mAmW
mW
mWmWmV/V
Bits
mVmVkΩ
1SeetheAN-835ApplicationNote,UnderstandingHighSpeedADCTestingandEvaluation,forpletesetofdefinitionsandinformationabouthowthesetestspleted.
2Theoverrangeconditionisspecifiedasbeing6dBmorethanthefull-scaleinputrange.
Rev.0|Page6of48
AD9277
DIGITALSPECIFICATIONS
AVDD1=1.8V,AVDD2=3.0V,DRVDD=1.8V,1.0VinternalADCreference,fIN=5MHz,fulltemperature,unlessotherwisenoted.
Table2.Parameter1CLOCKINPUTS(CLK+,CLK−)
LogicComplianceDifferentialInputVoltage2InputCommon-ModeVoltageInputResistance(Differential)InputCapacitanceCW4LOINPUTS(4LO+,4LO−)LogicComplianceDifferentialInputVoltage2InputCommon-ModeVoltageInputResistance(Differential)InputCapacitanceLOGICINPUTS(PDWN,STBY,SCLK,RESET)Logic1VoltageLogic0VoltageInputResistanceInputCapacitanceLOGICINPUT(CSB)Logic1VoltageLogic0VoltageInputResistanceInputCapacitanceLOGICINPUT(SDIO)Logic1VoltageLogic0VoltageInputResistanceInputCapacitanceLOGICOUTPUT(SDIO)3Logic1Voltage(IOH=800μA)Logic0Voltage(IOL=50μA)DIGITALOUTPUTS(DOUTx+,DOUTx−),(ANSI-644)1LogicComplianceDifferentialOutputVoltage(VOD)OutputOffsetVoltage(VOS)OutputCoding(Default)DIGITALOUTPUTS(DOUTx+,DOUTx−),(LOWPOWER,REDUCEDSIGNALOPTION)1LogicComplianceDifferentialOutputVoltage(VOD)OutputOffsetVoltage(VOS)OutputCoding(Default)LOGICOUTPUTS(GPO0,GPO1,GPO2,GPO3)Logic0Voltage(IOL=50μA)
Temperature
FullFull25°C25°
C FullFull25°C25°
C FullFull25°C25°
C FullFull25°C25°
C FullFull25°C25°
C FullFull FullFull Min250 2501.21.21.20 2471.125 Typ Max Unit CMOS/LVDS/LVPECL 1.2201.5 mVp-pVkΩpF CMOS/LVDS/LVPECL 1.2201.5 mVp-pVkΩpF 3.6
V 0.3
V 30 kΩ 0.5 pF 3.6
V 0.3
V 70 kΩ 0.5 pF DRVDD+0.3V 0.3
V 30 kΩ
2 pF 1.79
V 0.05
V LVDS 454 mV 1.375
V Offsetbinary LVDS Full 150 250 mV Full 1.10 1.30
V Offsetbinary Full 0.05
V 1SeetheAN-835ApplicationNote,UnderstandingHighSpeedADCTestingandEvaluation,forpletesetofdefinitionsandinformationabouthowthesetestspleted. 2SpecifiedforLVDSandLVPECLonly.3Specifiedfor13SDIOpinssharingthesameconnection. Rev.0|Page7of48 AD9277 SWITCHINGSPECIFICATIONS AVDD1=1.8V,AVDD2=3.0V,DRVDD=1.8V,1.0VinternalADCreference,fIN=5MHz,fulltemperature,unlessotherwisenoted. Table3.Parameter1CLOCK2 ClockRateClockPulseWidthHigh(tEH)ClockPulseWidthLow(tEL)OUTPUTPARAMETERS2,3PropagationDelay(tPD)RiseTime(tR)(20%to80%)FallTime(tF)(20%to80%)FCOPropagationDelay(tFCO)DCOPropagationDelay(tCPD)4DCOtoDataDelay(tDATA)4DCOtoFCODelay(tFRAME)4Data-to-DataSkew(tDATA-MAX−tDATA-MIN)Wake-UpTime(Standby),GAIN+=0.5VWake-UpTime(Power-Down)PipelineLatency TemperatureMin Full 10 Full Full FullFullFullFullFullFullFullFull25°C25°CFull (tSAMPLE/2)+1.5 (tSAMPLE/2)+1.5(tSAMPLE/24)−300(tSAMPLE/24)−300 APERTURE ApertureUncertainty(Jitter) 25°
C LOGENERATION 4LOFrequency Full
4 LODividerRESETSetupTime5 Full
5 LODividerRESETHoldTime5 Full
5 LODividerRESETHighPulseWidth Full 20 Typ 1010 (tSAMPLE/2)+2.3300300(tSAMPLE/2)+2.3tFCO+(tSAMPLE/24)(tSAMPLE/24)(tSAMPLE/24)±100218 <
1 Max50 (tSAMPLE/2)+3.1(tSAMPLE/2)+3.1(tSAMPLE/24)+300(tSAMPLE/24)+300±350 40 Unit MHznsns nspspsnsnspspspsμsmsClockcycles psrms MHznsnsns 1SeetheAN-835ApplicationNote,UnderstandingHighSpeedADCTestingandEvaluation,forpletesetofdefinitionsandinformationabouthowthesetestswere completed.2CanbeadjustedviatheSPI.3MeasurementsweremadeusingapartsolderedtoFR-4material.4tSAMPLE/24isbasedonthenumberofbitsdividedby2becausethedelaysarebasedonhalfdutycycles.5RESETedgetorising4LOedge. Rev.0|Page8of48 ADCTIMINGDIAGRAMS N–1AIN CLK–CLK+DCO–DCO+FCO–FCO+DOUTx–DOUTx+ AIN tEHtCPDtFCOtPD N–
1 CLK–CLK+DCO–DCO+FCO–FCO+DOUTx–DOUTx+ tEHtCPDtFCOtPD NtEL AD9277 08181-002 tFRAME tDATAMSBD12D11D10D9D8D7D6D5D4D3D2D1D0MSBD12N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–7N–
7 Figure2.14-BitDataSerialStream(Default) NtEL tFRAME tDATALSBD0D1D2D3D4D5D6D7D8D9D10D11D12LSBD0N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–7N–
7 Figure3.14-BitDataSerialStream,LSBFirst 08181-003 Rev.0|Page9of48 AD9277 ABSOLUTEMAXIMUMRATINGS Table4.ParameterAVDD1toGNDAVDD2toGNDDRVDDtoGNDGNDtoGNDAVDD2toAVDD1AVDD1toDRVDDAVDD2toDRVDDDigitalOutputs(DOUTx+,DOUTx−, DCO+,DCO−,FCO+,FCO−)toGNDCLK+,CLK−,SDIOtoGNDLI-x,LO-x,LOSW-xtoGNDCWI−,CWI+,CWQ−,CWQ+toGNDPDWN,STBY,SCLK,CSBtoGNDGAIN+,GAIN−,RESET,4LO+,4LO−, GPO0,GPO1,GPO2,GPO3toGNDRBIAS,VREFtoGNDOperatingTemperatureRange(Ambient)StorageTemperatureRange(Ambient)MaximumJunctionTemperatureLeadTemperature(Soldering,10sec) Rating−0.3Vto+2.0V−0.3Vto+3.9V−0.3Vto+2.0V−0.3Vto+0.3V−2.0Vto+3.9V−2.0Vto+2.0V−2.0Vto+3.9V−0.3Vto+2.0V −0.3Vto+2.0V−0.3Vto+3.9V−0.3Vto+3.9V−0.3Vto+2.0V−0.3Vto+3.9V −0.3Vto+2.0V−40°Cto+85°C−65°Cto+150°C150°C300°
C StressesabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thisisastressratingonly;functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability. THERMALIMPEDANCE Table5.AirflowVelocity(m/s)0.01.02.5 θJA1 θJB θJC Unit 20.3 °C/W 14.47.6 4.7 °C/W 12.9 °C/W 1θJAfora4-layerPCBwithsolidgroundplane(simulated).ExposedpadsolderedtoPCB. ESDCAUTION Rev.0|Page10of48 PINCONFIGURATIONANDFUNCTIONDESCRIPTIONS AD9277 100LOSW-E99LO-E98GND97GND96GND95CWQ+94CWQ–93CWI+92CWI–91AVDD290VREF89RBIAS88GAIN+87GAIN–86AVDD285AVDD2844LO+834LO–82RESET81GPO380GPO279GPO178GPO077LO-D76LOSW-
D LI-E1LG-E2AVDD23AVDD14LO-F5LOSW-F6 LI-F7LG-F8AVDD29AVDD110LO-G11LOSW-G12LI-G13LG-G14AVDD215AVDD116LO-H17LOSW-H18LI-H19LG-H20AVDD221AVDD122CLK–23CLK+24AVDD125 PIN1INDICATOR EXPOSEDPADDLE,PIN0(BOTTOMOFPACKAGE) AD9277 TOPVIEW(NottoScale) 75LI-D74LG-D73AVDD272AVDD171LO-C70LOSW-C69LI-C68LG-C67AVDD266AVDD165LO-B64LOSW-B63LI-B62LG-B61AVDD260AVDD159LO-A58LOSW-A57LI-A56LG-A55AVDD254AVDD153CSB52SDIO51SCLK DRVDD26DOUTH–27DOUTH+28DOUTG–29DOUTG+30DOUTF–31DOUTF+32DOUTE–33DOUTE+34 DCO–35DCO+36FCO–37FCO+38DOUTD–39DOUTD+40DOUTC–41DOUTC+42DOUTB–43DOUTB+44DOUTA–45DOUTA+46DRVDD47STBY48PDWN49AVDD150 08181-004 NOTES1.THEEXPOSEDPADSHOULDBETIEDTOAQUIETANALOGGROUND. Figure4.PinConfiguration Table6.PinFunctionDescriptions PinNo. Name 0,96,97,98 GND
1 LI-
E 2 LG-
E 3,9,15,21,55,61,67,73,85,86,91 AVDD2 4,10,16,22,25,50,54,60,66,72 AVDD1
5 LO-
F 6 LOSW-
F 7 LI-
F 8 LG-
F 11 LO-
G 12 LOSW-
G 13 LI-
G 14 LG-
G 17 LO-
H 18 LOSW-
H 19 LI-
H 20 LG-
H Description
Ground.Exposedpaddleshouldbetiedtoaquietanalogground.LNAAnalogInputforChannelE.LNAGroundforChannelE.3.0VAnalogSupply. 1.8VAnalogSupply. LNAAnalogInvertedOutputforChannelF.LNAAnalogSwitchedOutputforChannelF.LNAAnalogInputforChannelF.LNAGroundforChannelF.LNAAnalogInvertedOutputforChannelG.LNAAnalogSwitchedOutputforChannelG.LNAAnalogInputforChannelG.LNAGroundforChannelG.LNAAnalogInvertedOutputforChannelH.LNAAnalogSwitchedOutputforChannelH.LNAAnalogInputforChannelH.LNAGroundforChannelH. Rev.0|Page11of48 AD9277 PinNo.232426,472728293031323334353637383940414243444546484951525356575859626364656869707174757677787980818283848788 NameCLK−CLK+DRVDDDOUTH−DOUTH+DOUTG−DOUTG+DOUTF−DOUTF+DOUTE−DOUTE+DCO−DCO+FCO−FCO+DOUTD−DOUTD+DOUTC−DOUTC+DOUTB−DOUTB+DOUTA−DOUTA+STBYPDWNSCLKSDIOCSBLG-ALI-ALOSW-ALO-ALG-BLI-BLOSW-BLO-BLG-CLI-CLOSW-CLO-CLG-DLI-DLOSW-DLO-DGPO0GPO1GPO2GPO3RESET4LO−4LO+GAIN−GAIN+ DescriptionClockInputComplement.ClockInputTrue.1.8VDigitalOutputDriverSupply.ADCHDigitalOutputComplement.ADCHDigitalOutputTrue.ADCGDigitalOutputComplement.ADCGDigitalOutputTrue.ADCFDigitalOutputComplement.ADCFDigitalOutputTrue.ADCEDigitalOutputComplement.ADCEDigitalOutputTrue.DigitalClockOutputComplement.DigitalClockOutputTrue.DigitalFrameClockOutputComplement.DigitalFrameClockOutputTrue.ADCDDigitalOutputComplement.ADCDDigitalOutputTrue.ADCCDigitalOutputComplement.ADCCDigitalOutputTrue.ADCBDigitalOutputComplement.ADCBDigitalOutputTrue.ADCADigitalOutputComplement.ADCADigitalOutputTrue.StandbyPower-Down.FullPower-Down.SerialClock.SerialDataInput/Output.ChipSelectBar.LNAGroundforChannelA.LNAAnalogInputforChannelA.LNAAnalogSwitchedOutputforChannelA.LNAAnalogInvertedOutputforChannelA.LNAGroundforChannelB.LNAAnalogInputforChannelB.LNAAnalogSwitchedOutputforChannelB.LNAAnalogInvertedOutputforChannelB.LNAGroundforChannelC.LNAAnalogInputforChannelC.LNAAnalogSwitchedOutputforChannelC.LNAAnalogInvertedOutputforChannelC.LNAGroundforChannelD.LNAAnalogInputforChannelD.LNAAnalogSwitchedOutputforChannelD.LNAAnalogInvertedOutputforChannelD.General-PurposeOpen-DrainOutput0.General-PurposeOpen-DrainOutput1.General-PurposeOpen-DrainOutput2.General-PurposeOpen-DrainOutput3.ResetforSynchronizing4LODivide-by-4Counter.CWDoppler4LOInputComplement.CWDoppler4LOInputTrue.GainControlVoltageInputComplement.GainControlVoltageInputTrue. Rev.0|Page12of48 PinNo.89909293949599100 NameRBIASVREFCWI−CWI+CWQ−CWQ+LO-ELOSW-
E DescriptionExternalResistortoSettheInternalADCCoreBiasCurrent.VoltageReferenceInput/Output.CWDopplerIOutputComplement.CWDopplerIOutputTrue.CWDopplerQOutputComplement.CWDopplerQOutputTrue.LNAAnalogInvertedOutputforChannelE.LNAAnalogSwitchedOutputforChannelE. AD9277 Rev.0|Page13of48 AD9277 TYPICALPERFORMANCECHARACTERISTICS TGCMODE fSAMPLE=50MSPS,fIN=5MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,PGAgain=24dB,AAFLPFcutoff=fSAMPLE/4.5,HPFcutoff=LPFcutoff/20.7(default). 2.0 25 PERCENTAGEOFUNITS(%) GAINERROR(dB) 08181-005 1.5 201.0 0.5 –40°
C 15 +25°
C 0+85°
C –0.5 10 –1.05 –1.5 –2.00 0.20.40.60.81.01.21.41.6GAIN+(V) Figure5.GainErrorvs.GAIN+atThreeTemperatures
0 GAINERROR(dB) Figure8.GainErrorHistogram,GAIN+=1.44V 25 25 –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-008 20 20 PERCENTAGEOFUNITS(%) 08181-009 PERCENTAGEOFUNITS(%) 15 15 10 10
5 5 PERCENTAGEOFUNITS(%) 08181-010 PERCENTAGEOFUNITS(%) –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-007 –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-006 0GAINERROR(dB) Figure6.GainErrorHistogram,GAIN+=0.16V 141210 86420 GAINERROR(dB) Figure7.GainErrorHistogram,GAIN+=0.8V 0–1.25–1.00–0.75–0.50–0.250 0.250.500.751.001.25 CHANNEL-TO-CHANNELGAINMATCHING(dB) Figure9.GainMatchHistogram,GAIN+=0.3V 25 20 15 10
5 Rev.0|Page14of48 0–1.25–1.00–0.75–0.50–0.250 0.250.500.751.001.25 CHANNEL-TO-CHANNELGAINMATCHING(dB) Figure10.GainMatchHistogram,GAIN+=1.3V NUMBEROFHITS NUMBEROFHITS 180,000160,000140,000120,000100,000 80,000 60,00040,000 20,0000–12–10–8–6–4–2024681012CODES Figure11.Output-ReferredNoiseHistogram,GAIN+=0.0V 70,000 60,000 50,000 40,00030,00020,000 10,000 0–35–30–25–20–15–10–505 CODES 101520 253035 Figure12.Output-ReferredNoiseHistogram,GAIN+=1.6V 2.0 1.8 1.6 1.4 LNAGAIN=15.6dB 1.2 LNAGAIN=17.9dB1.0 0.8 LNAGAIN=21.3dB 0.6 0.4 0.2
0 1
2 3
4 5
6 7
8 9 10 FREQUENCY(MHz) Figure13.Short-Circuit,Input-ReferredNoisevs.Frequency,PGAGain=30dB,GAIN+=1.6V 08181-013 AMPLITUDE(dBFS) 08181-012 SNR/SINAD(dBFS) 08181-011 OUTPUT-REFERREDNOISE(dBFS/Hz) AD9277 –126 –128 –130–132–134–136 LNAGAIN=21.3dBLNAGAIN=17.9dBLNAGAIN=15.6dB –138 –140 –1420 0.20.40.60.81.01.21.41.6GAIN+(V) Figure14.Short-Circuit,Output-ReferredNoisevs.GAIN+ 08181-014 64 62SNR 60 58 56 SINAD54 52 50 0.4 0.6 0.8 1.0 1.2 1.4 1.6 GAIN+(V) Figure15.SNR/SINADvs.GAIN+,AIN=−1.0dBFS 08181-015
0 –550MSPS –1040MSPS –15 –20 –250
5 10 15 20 25 30 35 40 FREQUENCY(MHz) Figure16.AntialiasingFilter(AAF)Pass-BandResponse,LPFCutoff=fSAMPLE/4.5 08181-016 INPUT-REFERREDNOISE(nV/Hz) Rev.0|Page15of48 08181-021 AD9277
0 SECOND-ORDERHARMONICDISTORTION(dBc) –10 –20 –30 –40GAIN+=0.4V –50 –60 GAIN+=1.0V –70–80GAIN+=1.6V –90
0 2
4 6
8 10 12 14 16 INPUTFREQUENCY(MHz) Figure17.Second-OrderHarmonicDistortionvs.Frequency,AIN=−1.0dBFS
0 THIRD-ORDERHARMONICDISTORTION(dBc) –10 –20 –30 –40GAIN+=0.4V –50GAIN+=1.6V –60 –70 GAIN+=1.0V–80 –90
0 2
4 6
8 10 12 14 16 INPUTFREQUENCY(MHz) Figure18.Third-OrderHarmonicDistortionvs.Frequency,AIN=−1.0dBFS SECOND-ORDERHARMONICDISTORTION(dBFS)
0 –20 –40 –60GAIN+=0V –80 –100 GAIN+=0.8V GAIN+=1.6V –120–50–45–40–35–30–25–20–15–10–50 ADCOUTPUTLEVEL(dBFS) Figure19.Second-OrderHarmonicDistortionvs.ADCOutputLevel 08181-020 IMD3(dBFS) 08181-019 IMD3(dBFS) 08181-018 THIRD-ORDERHARMONICDISTORTION(dBc)
0 –20 –40 –60 –80 GAIN+=1.6V GAIN+=0V –100 GAIN+=0.8V–120 –50–45–40–35–30–25–20–15–10–50ADCOUTPUTLEVEL(dBFS) Figure20.Third-OrderHarmonicDistortionvs.ADCOutputLevel 0fIN2=fIN1+0.01MHz –10fIN1=–1dBFS,fIN2=–21dBFS–20 –30 –40 –50 8MHz–60 2.3MHz5MHz –70 –80 –90 0.4 0.6 0.8 1.0 1.2 1.4 1.6 GAIN+(V) Figure21.IMD3vs.GAIN+ 0fIN1=5.00MHz,fIN2=5.01MHzFUND2LEVEL=FUND1LEVEL–20dB –20 –40 –60 GAIN+=0V GAIN+=1.6V –80 –100 GAIN+=0.8V –120 –40–35–30–25–20–15–10–
5 0 AMPLITUDELEVEL(dBFS) Figure22.IMD3vs.AmplitudeLevel 08181-022 08181-023 Rev.0|Page16of48 AD9277 CWDOPPLERMODE fRF=2.5MHzat−3dBFS,f4LO=10MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,allCWchannelsenabled,phaserotation0°. QUADRATUREPHASEERROR(Degrees) 1.2 1.0 0.8 0.6 0.4 0.2
0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2100 1k 10k BASEBANDFREQUENCY(Hz) Figure23.QuadraturePhaseErrorvs.BasebandFrequency 08181-073 DYNAMICRANGE(dBFS/Hz) 175 170 CHA+B+C+D+E+F+G+
H CHA+B+C+
D 165 CHA+
B CHA160 155 150 1450 10002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure26.Small-SignalDynamicRange 08181-076 0.10 QUADRATUREAMPLITUDEIMBALANCE(dB) 0.08 0.06 0.04 0.02
0 –0.02 –0.04 –0.06 –0.08 08181-074 –0.10100 1k 10k BASEBANDFREQUENCY(Hz) Figure24.QuadratureAmplitudeImbalancevs.BasebandFrequency NOISEFIGURE(dB) 12 10 8 6 4 2 0010002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure27.NoiseFigurevs.BasebandFrequency 08181-077 OUTPUT-REFERREDSNR(dBc/Hz) 140 142 144 146 148 150 152 154 156 158 1kHzOFFSET 1605kHzOFFSET 162 164 166–20–18–16–14–12–10–8–6–4–20 INPUTLEVEL(dBFS) Figure25.Output-ReferredSNRvs.InputLevel 08181-075 OUTPUT-REFERREDSNR(dBc/Hz) 130 135 140 145 150 155 160 1650 10002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure28.Output-ReferredSNRvs.BasebandFrequency 08181-078 Rev.0|Page17of48 DYNAMICRANGE(dB) 08181-079 AD9277 170 168 166 LNAGAIN=15.6dB 164 LNAGAIN=17.9dB 162 LNAGAIN=21.3dB160 158 156 1541
2 3
4 5678910 RFFREQUENCY(MHz) Figure29.Small-SignalDynamicRangevs.RFFrequency Rev.0|Page18of48 EQUIVALENTCIRCUITS AVDD2VCM LI-x,LG-x 15kΩ 08181-024 Figure30.EquivalentLNAInputCircuit AVDD2 AVDD2 LO-x, 10Ω LOSW-x 08181-025 Figure31.EquivalentLNAOutputCircuit AVDD1 CLK+ 350Ω AVDD1 CLK– 350Ω 10kΩ1.25V 10kΩ Figure32.EquivalentClockInputCircuit AVDD2 4LO+ 350Ω AVDD2 4LO– 350Ω 10kΩ1.25V 10kΩ Figure33.Equivalent4LOInputCircuit 08181-027 08181-026 AD9277 AVDD SDIO 350Ω30kΩ Figure34.EquivalentSDIOInputCircuit 08181-028 DRVDD DRVDD DRVDD VDOUTx–
V VDOUTx+
V DRVDD DRVDD DRGND Figure35.EquivalentDigitalOutputCircuit 08181-029 AVDD1 SCLK,PDWN,ORSTBY 350Ω30kΩ 08181-030 Figure36.EquivalentSCLK,PDWN,orSTBYInputCircuit AVDD2 RESET 350Ω 08181-031 Rev.0|Page19of48 Figure37.EquivalentRESETInputCircuit AD9277 CSB AVDD1 AVDD1 350Ω70kΩ Figure38.EquivalentCSBInputCircuit 08181-034 VREF6kΩ Figure39.EquivalentVREFCircuit RBIAS 100Ω Figure40.EquivalentRBIASCircuit 08181-033 08181-032 AVDD250Ω GAIN+ 08181-035 Figure41.EquivalentGAIN+InputCircuit GAIN– AVDD250Ω 0.8V70kΩ 08181-036 08181-037 Figure42.EquivalentGAIN−InputCircuit AVDD2CWx+,CWx– Figure43.EquivalentCWI±,CWQ±OutputCircuit AVDD210Ω GPOx Figure44.EquivalentGPOxOutputCircuit 08181-038 Rev.0|Page20of48 THEORYOFOPERATION ULTRASOUND TheprimaryapplicationfortheAD9277ismedicalultrasound.Figure45showsasimplifiedblockdiagramofanultrasoundsystem.Acriticalfunctionofanultrasoundsystemisthetimegaincontrol(TGC)pensationforphysiologicalsignalattenuation.Becausetheattenuationofultrasoundsignalsisexponentialwithrespecttodistance(time),alinear-in-dBVGAistheoptimalsolution. Keyrequirementsinanultrasoundsignalchainareverylownoise,activeinputtermination,fastoverloadrecovery,lowpower,anddifferentialdrivetoanADC.Becauseultrasoundmachinesusebeamformingtechniquesrequiringlargebinary-weightednumbersofchannels(forexample,32to512),usingthelowestpoweratthelowestpossiblenoiseisofchiefimportance. AD9277 Mostmodernultrasoundmachinesusedigitalbeamforming.Inthistechnique,thesignalisconvertedtodigitalformatimmediatelyfollowingtheTGCamplifier,andthenbeamformingisplisheddigitally.TheADCresolutionof14bitswithupto50MSPSsamplingsatisfiestherequirementsofbothgeneral-purposeandhighendsystems.Powerconservationandlowcostaretwoofthemostimportantfactorsinlowendandportableultrasoundmachines,andtheAD9277isdesignedtomeetthesecriteria.Foradditionalinformationregardingultrasoundsystems,referto“HowUltrasoundSystemConsiderationsInfluenceFront-EndComponentChoice,”AnalogDialogue,Volume36,Number3,May–July2002,and“TheAD9271—ARevolutionarySolutionforPortableUltrasound,”AnalogDialogue,Volume41,Number7,July2007. TxHVAMPLIFIERS HVMUX/DEMUX TRANSDUCERARRAY 128,256,ETC.,ELEMENTS BIDIRECTIONALCABLE T/RSWITCHES TxBEAMFORMER LNA VGA AAF ADC BEAMFORMERCENTRALCONTROL MULTICHANNELS RxBEAMFORMER(BANDFMODES) CW(ANALOG)BEAMFORMER SPECTRALDOPPLERPROCESSING MODE IMAGEANDMOTION PROCESSING(BMODE) COLORDOPPLER(PW)PROCESSING (FMODE) 08181-039 AUDIOOUTPUT Figure45.SimplifiedUltrasoundSystemBlockDiagram DISPLAY Rev.0|Page21of48 AD9277 T/RSWITCHCS CSH TRANSDUCER RFB1RFB2 4LO–4LO+RESETLO-x LOSW-x
4 LOGENERATION LI-xLG-x CLG LNA 15.6dB,17.9dB,21.3dB ATTENUATOR–42dBTO0dB GAININTERPOLATOR POSTAMP 21dB,24dB,27dB,30dB X-AMPVGA GAIN+ GAIN– AAF Figure46.SimplifiedBlockDiagramofaSingleChannel PIPELINEADC SERIALLVDS CWI+CWI– CWQ+CWQ– DOUTx+DOUTx– 08181-040 CHANNELOVERVIEW EachchannelcontainsbothaTGCsignalpathandaCWDopplersignalpath.Commontobothsignalpaths,theLNAprovidesuseradjustableinputimpedancetermination.TheCWDopplerpathincludesanI/Qdemodulator.TheTGCpathincludesadifferentialX-AMP®VGA,anantialiasingfilter,andanADC.Figure46showsasimplifiedblockdiagramwithponents. Thesignalpathisfullydifferentialthroughouttomaximizesignalswingandreduceeven-orderdistortion;however,theLNAisdesignedtobedrivenfromasingle-endedsignalsource. LowNoiseAmplifier(LNA) GoodnoiseperformancereliesonaproprietaryultralownoiseLNAatthebeginningofthesignalchain,whichminimizesthenoisecontributioninthefollowingVGA.Activeimpedancecontroloptimizesnoiseperformanceforapplicationsthatbenefitfrominputimpedancematching. AsimplifiedschematicoftheLNAisshowninFigure47.LI-xiscapacitivelycoupledtothesource.Anon-chipbiasgeneratorestablishesdcinputbiasvoltagesofaround0.9Vandcentersthemon-modelevelsat1.5V(AVDD2dividedby2).Acapacitor,CLG,ofthesamevalueastheinputcouplingcapacitor,CS,isconnectedfromtheLG-xpintoground. ItishighlymendedthattheLG-xpinsformaKelvintypeconnectiontotheinputorprobeconnectionground.SimplyconnectingtheLG-xpintogroundnearthedevicecanallowdifferencesinpotentialtobeamplifiedthroughtheLNA.Thisgenerallyshowsupasadcoffsetvoltagethatcanvaryfromchanneltochannelandparttopart,dependingontheapplicationandthelayoutofthePCB. CFBVO+ T/RSWITCH CS VCMLI-xCSH TRANSDUCER RFB1RFB2 VO–LOSW-xLO-x VCM LG-x CLG 08181-041 Figure47.SimplifiedLNASchematic TheLNAsupportsdifferentialoutputvoltagesashighas4.4Vp-pwithpositiveandnegativeexcursionsof±1.1Vfrommonmodevoltageof1.5V.TheLNAdifferentialgainsetsthemaximuminputsignalbeforesaturation.OneofthreegainsissetthroughtheSPI.Thecorrespondingfull-scaleinputforthegainsettingsof15.6dB,17.9dB,and21.3dBis733mVp-p,550mVp-p,and367mVp-p,respectively.Overloadprotectionensuresquickrecoverytimefromlargeinputvoltages.Becausetheinputsarecapacitivelycoupledtoabiasvoltagenearmidsupply,verylargeinputscanbehandledwithoutinteractingwiththeESDprotection. Rev.0|Page22of48 Lowvaluefeedbackresistorsandthecurrent-drivingcapabilityoftheoutputstageallowtheLNAtoachievealowinputreferrednoisevoltageof0.75nV/√Hz(atagainof21.3dB).Thisisachievedwithacurrentconsumptionofonly27mAperchannel(80mW).On-chipresistormatchingresultsinprecisesingle-endedgains,whicharecriticalforurateimpedancecontrol.Theuseofafullyologyandnegativefeedbackminimizesdistortion.Lowsecond-orderharmonicdistortionisparticularlyimportantinsecondharmonicultrasoundimagingapplications.Differentialsignalingenablessmallerswingsateachoutput,furtherreducingthird-orderharmonicdistortion. ActiveImpedanceMatching TheLNAconsistsofasingle-endedvoltagegainamplifierwithdifferentialoutputsandthenegativeoutputexternallyavailable.Forexample,withafixedgainof8×(17.9dB),anactiveinputterminationissynthesizedbyconnectingafeedbackresistorbetweenthenegativeoutputpin,LO-x,andthepositiveinputpin,LI-x.Thiswell-knowntechniqueisusedforinterfacingmultipleprobeimpedancestoasinglesystem.TheinputresistanceisshowninEquation1. R=RFB
(1) IN(1+A2) where:A/2isthesingle-endedgainorthegainfromtheLI-xinputstotheLO-xoutputs.RFBistheresultingimpedanceoftheRFB1andbination(seeFigure47). Becausetheamplifierhasagainof8×fromitsinputtoitsdifferentialoutput,itisimportanttonotethatthegainA/2isthegainfromPinLI-xtoPinLO-xandthatitis6dBlessthanthegainoftheamplifier,or11.9dB(4×).Theinputresistanceisreducedbyaninternalbiasresistorof15kΩinparallelwiththesourceresistanceconnectedtoPinLI-x,withPinLG-xacgrounded.Equation2canbeusedtocalculatetherequiredRFBforadesiredRIN,evenforhighervaluesofRIN. RIN=(1R+FB3)||15kΩ
(2) Forexample,tosetRINto200Ω,thevalueofRFBmustbe1000Ω.Ifthesimplifiedequation(Equation2)isusedtocalculateRIN,thevalueis188Ω,resultinginagainerroroflessthan0.6dB.Somefactors,suchasthepresenceofadynamicsourceresistance,mayinfluencetheabsolutegainuracymoresignificantly.Athigherfrequencies,theinputcapacitanceoftheLNAmustbeconsidered.TheusermustdeterminethelevelofmatchinguracyandadjustRFBordingly. AD9277 Thebandwidth(BW)oftheLNAisgreaterthan100MHz.Ultimately,theBWoftheLNAlimitstheuracyofthesynthesizedRIN.ForRIN=RSuptoabout200Ω,thebestmatchisbetween100kHzand10MHz,wherethelowerfrequencylimitisdeterminedbythesizeoftheaccouplingcapacitors,andtheupperlimitisdeterminedbytheLNABW.Furthermore,theinputcapacitanceandRSlimittheBWathigherfrequencies.Figure48showsRINvs.frequencyforvariousvaluesofRFB. 1kRS=500Ω,RFB=2kΩ RS=200Ω,RFB=800Ω RS=100Ω,RFB=400Ω,CSH=20pF100 RS=50Ω,RFB=200Ω,CSH=70pF INPUTRESISTANCE(Ω) 08181-042 10100k 1M 10M FREQUENCY(Hz) 100M Figure48.RINvs.FrequencyforVariousValuesofRFB(EffectsofRSandCSHAreAlsoShown) NotethatatthelowestvalueofRIN(50Ω),RINpeaksatfrequenciesgreaterthan10MHz.ThisisduetotheBWroll-offoftheLNA,asmentionedpreviously. However,ascanbeseenforlargerRINvalues,parasiticcapacitancestartsrollingoffthesignalBWbeforetheLNAcanproducepeaking.CSHfurtherdegradesthematch;therefore,CSHshouldnotbeusedforvaluesofRINthataregreaterthan100Ω.Table7liststhemendedvaluesforRFBandCSHintermsofRIN. CFBisneededinserieswithRFBbecausethedclevelsatPinLO-xandPinLI-xareunequal. Table7.ActiveTerminationExternalComponentValues LNAGain(dB) RIN(Ω) RFB(Ω) MinimumCSH(pF)BW
0 10 100 1k RS(Ω) Figure50.NoiseFigurevs.RSforResistiveTermination,ActiveTerminationMatched,andUnterminatedInputs,VGAIN=0.8V NOISEFIGURE(dB)
8 7 RIN=50Ω RIN=75Ω RIN=100Ω
6 RIN=200Ω UNTERMINATED
5 4
3 2
1 0 10 100 1k RS(Ω) Figure51.NoiseFigurevs.RSforVariousFixedValuesofRIN,ActiveTerminationMatchedInputs,VGAIN=0.8V 08181-045 Rev.0|Page24of48 INPUTOVERDRIVE Excellentoverloadbehaviorisofprimaryimportanceinultrasound.BoththeLNAandVGAhavebuilt-inoverdriveprotectionandquicklyrecoverafteranoverloadevent. InputOverloadProtection Aswithanyamplifier,voltageclampingpriortotheinputsishighlymendediftheapplicationissubjecttohightransientvoltages. Figure52showsasimplifiedultrasoundtransducerinterface.montransducerelementservesthedualfunctionsoftransmittingandreceivingultrasoundenergy.Duringthetransmittingphase,highvoltagepulsesareappliedtotheceramicelements.Atypicaltransmit/receive(T/R)switchcanconsistoffourhighvoltagediodesinabridgeconfiguration.Althoughthediodesideallyblocktransmitpulsesfromthesensitivereceiverinput,diodecharacteristicsarenotideal,andtheresultingleakagetransientsimposedontheLI-xinputscanbeproblematic. Becauseultrasoundisapulsesystemandtime-of-flightisusedtodeterminedepth,quickrecoveryfrominputoverloadsisessential.OverloadcanurinthepreamplifierandintheVGA.Immediatelyfollowingatransmitpulse,thetypicalVGAgainsarelow,andtheLNAissubjecttooverloadfromT/Rswitchleakage.Withincreasinggain,theVGAcaneoverloadedduetostrongechoesthaturnearfieldechoesandacousticallydensematerials,suchasbone. Figure52illustratesanexternaloverloadprotectionscheme.Apairofback-to-backsignaldiodesshouldbeinplacepriortotheaccouplingcapacitors.Keepinmindthatalldiodesarepronetoexhibitingsomeamountofshotnoise.Manytypesofdiodesareavailableforachievingthedesirednoiseperformance.TheconfigurationshowninFigure52tendstoadd2nV/√Hzofinput-referrednoise.Decreasingthe5kΩresistorandincreasingthe2kΩresistormayimprovenoisecontribution,dependingontheapplication.WiththediodesshowninFigure52,clampinglevelsof±0.5Vorlesssignificantlyenhancetheoverloadperformanceofthesystem. +5V TxDRIVER 5kΩHV AD9277 10nF 08181-046 LNA 2kΩ5kΩ TRANSDUCER–5V 10nF Figure52.InputOverloadProtection AD9277 CWDOPPLEROPERATION EachchanneloftheAD9277includesanI/Qdemodulator.Eachdemodulatorhasanindividualprogrammablephaseshifter.TheI/Qdemodulatorisidealforphasedarraybeamformingapplicationsinmedicalultrasound.Eachchannelcanbeprogrammedfor16delaystates(360°/16or22.5°/step),selectableviatheSPIport.TheparthasaRESETinputusedtosynchronizetheLOdividersofeachchannel.IfmultipleAD9277sareused,monRESETacrossthearrayensuressynchronizedphaseforallchannels.InternaltotheAD9277,theindividualchannelIandQoutputsarecurrentsummed.IfmultipleAD9277sareused,theIandQoutputsfromeachAD9277canbecurrentsummedandconvertedtoavoltageusinganexternaltransimpedanceamplifier. QuadratureGeneration Theinternal0°and90°LOphasesaredigitallygeneratedbyadivide-by-4logiccircuit.Thedividerisdc-coupledandinherentlybroadband;themaximumLOfrequencyislimitedonlybyitsswitchingspeed.ThedutycycleofthequadratureLOsignalsisintrinsically50%andisunaffectedbytheasymmetryoftheexternallyconnected4LOinput.Furthermore,thedividerisimplementedsuchthatthe4LOsignalreclocksthefinalflipflopsthatgeneratetheinternalLOsignalsandtherebyminimizesnoiseintroducedbythedividecircuitry. Foroptimumperformance,the4LOinputisdrivendifferentially,asdoneontheAD9277evaluationboard.mon-modevoltageoneachpinisapproximately1.2Vwiththenominal3
1.SmallFootprint.Eightchannelsarecontainedinasmall,space-savingpackage.FullTGCpath,ADC,andI/Qdemodulatorcontainedwithina100-lead,16mm×16mmTQFP.
2.LowPower.InTGCmode,lowpowerof207mWperchannelat50MSPS.InCWmode,ultralowpowerof94mWperchannel.
3.IntegratedHighDynamicRangeI/QDemodulatorwithPhaseRotation.
4.EaseofUse.Adataclockoutput(DCO±)operatesupto480MHzandsupportsdoubledatarate(DDR)operation.
5.UserFlexibility.Serialportinterface(SPI)controloffersawiderangeofflexiblefeaturestomeetspecificsystemrequirements.
6.IntegratedSecond-OrderAntialiasingFilter.ThisfilterisplacedbeforetheADCandisprogrammablefrom8MHzto18MHz. FUNCTIONALBLOCKDIAGRAM AVDD1AVDD2PDWNSTBY DRVDD LO-ATOLO-
H LOSW-ATOLOSW-HLI-ATOLI-
H LG-ATOLG-
H LNA I/QDEMODULATOR VGA AAF 8CHANNELS 14-BITADC SERIALLVDS DOUTA+TODOUTH+DOUTA–TODOUTH– LOGENERATION REFERENCE SERIALPORTINTERFACE DATARATEMULTIPLIER FCO+FCO–DCO+DCO– RESET4LO+4LO– GAIN+GAIN– CWI–CWI+CWQ–CWQ+VREFRBIASGPO[0:3]CSBSCLKSDIOCLK+CLK– 08181-001 Figure1. Rev.0 InformationfurnishedbyAnalogDevicesisbelievedtobeurateandreliable.However,noresponsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorotherrightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. OneTechnologyWay,
P.O.Box9106,Norwood,MA02062-9106,
U.S.A. Tel:781.329.4700 Fax:781.461.3113 ©2009AnalogDevices,Inc.Allrightsreserved. AD9277*PRODUCTPAGEQUICKLINKS LastContentUpdate:02/23/2017 COMPARABLEPARTS Viewaparametricsearchparableparts. EVALUATIONKITS •AD9277EvaluationBoard DOCUMENTATION DataSheet•AD9277:OctalLNA/VGA/AAF/ADCandCWI&
Q DemodulatorDataSheetUserGuides•UG-016:EvaluationBoardUserGuide TOOLSANDSIMULATIONS •VisualAnalog•AD9277IBISModels REFERENCEMATERIALS Press•Industry’sFirstOctalUltrasoundReceiverwithDigitalI/Q DemodulatorandDecimationFilterReducesProcessorOverheadinUltrasoundSystems•LowCost,OctalUltrasoundReceiverwithOn-ChipRFDecimatorandJESD204BSerialInterfaceTechnicalArticles•MS-2210:DesigningPowerSuppliesforHighSpeedADC DESIGNRESOURCES •AD9277MaterialDeclaration•PCN-PDNInformation•QualityAndReliability•SymbolsandFootprints DISCUSSIONS ViewallAD9277EngineerZoneDiscussions. SAMPLEANDBUY Visittheproductpagetoseepricingoptions. TECHNICALSUPPORT Submitatechnicalquestionorfindyourregionalsupportnumber. DOCUMENTFEEDBACK Submitfeedbackforthisdatasheet. ThispageisdynamicallygeneratedbyAnalogDevices,Inc.,andinsertedintothisdatasheet.Adynamicchangetothecontentonthispagewillnottriggerachangetoeithertherevisionnumberorthecontentoftheproductdatasheet.Thisdynamicpagemaybefrequentlymodified. AD9277 TABLEOFCONTENTS Features
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1Applications.......................................................................................
1ProductHighlights...........................................................................1FunctionalBlockDiagram..............................................................1RevisionHistory...............................................................................2GeneralDescription.........................................................................3Specifications.....................................................................................
4 ACSpecifications..........................................................................4DigitalSpecifications...................................................................7SwitchingSpecifications..............................................................8ADCTimingDiagrams...............................................................9AbsoluteMaximumRatings..........................................................10ThermalImpedance...................................................................10ESDCaution................................................................................10PinConfigurationandFunctionDescriptions...........................11TypicalPerformanceCharacteristics...........................................14TGCMode...................................................................................14CWDopplerMode.....................................................................17EquivalentCircuits.........................................................................19TheoryofOperation......................................................................21 REVISIONHISTORY 7/09—Revision0:InitialVersion Ultrasound..................................................................................21ChannelOverview.....................................................................22InputOverdrive..........................................................................25CWDopplerOperation.............................................................25TGCOperation...........................................................................29ADC
.............................................................................................
33ClockInputConsiderations......................................................33DigitalOutputsandTiming.....................................................35SerialPortInterface(SPI)..............................................................39HardwareInterface.....................................................................40MemoryMap..................................................................................41ReadingtheMemoryMapTable..............................................41ReservedLocations....................................................................41DefaultValues.............................................................................41LogicLevels.................................................................................41ApplicationsInformation..............................................................45PowerandGroundmendations...................................45ExposedPaddleThermalHeatSlugmendations......45OutlineDimensions.......................................................................46OrderingGuide..........................................................................46 Rev.0|Page2of48 GENERALDESCRIPTION TheAD9277isdesignedforlowcost,lowpower,smallsize,andeaseofuse.Itcontainseightchannelsofavariablegainamplifier(VGA)withalownoisepreamplifier(LNA);anantialiasingfilter(AAF);a14-bit,10MSPSto50MSPSanalog-todigitalconverter(ADC);andanI/Qdemodulatorwithprogrammablephaserotation. Eachchannelfeaturesavariablegainrangeof42dB,afullydifferentialsignalpath,anactiveinputpreamplifiertermination,amaximumgainofupto52dB,andanADCwithaconversionrateofupto50MSPS.Thechannelisoptimizedfordynamicperformanceandlowpowerinapplicationswhereasmallpackagesizeiscritical. TheLNAhasasingle-ended-to-differentialgainthatisselectablethroughtheSPI.TheLNAinputnoiseistypically0.75nV/√Hzatagainof21.3dB,andbinedinput-referrednoiseoftheentirechannelis0.85nV/√Hzatmaximumgain.Assuminga15MHznoisebandwidth(NBW)anda21.3dBLNAgain,theinputSNRisroughly92dB.InCWDopplermode,eachLNAoutputdrivesanI/Qdemodulator.EachdemodulatorhasindependentlyprogrammablephaserotationthroughtheSPIwith16phasesettings. TheAD9277requiresaLVPECL-/CMOS-/patiblesamplerateclockforfullperformanceoperation.Noexternalreferenceorponentsarerequiredformanyapplications. AD9277 TheADCautomaticallymultipliesthesamplerateclockfortheappropriateLVDSserialdatarate.Adataclock(DCO±)forcapturingdataontheoutputandaframeclock(FCO±)triggerforsignalinganewoutputbyteareprovided. Poweringdownindividualchannelsissupportedtoincreasebatterylifeforportableapplications.Astandbymodeoptionallowsquickpower-upforpowercycling.InCWDoppleroperation,theVGA,AAF,andADCarepowereddown.ThepoweroftheTGCpathscaleswithselectableADCspeedpowermodes. TheADCcontainsseveralfeaturesdesignedtomaximizeflexibilityandminimizesystemcost,suchasaprogrammableclock,dataalignment,andprogrammabledigitaltestpatterngeneration.Thedigitaltestpatternsincludebuilt-infixedpatterns,built-inpseudorandompatterns,andcustomuser-definedtestpatternsenteredviatheserialportinterface. FabricatedinanadvancedCMOSprocess,theAD9277isavailableina16mm×16mm,pliant,100-leadTQFP.Itisspecifiedovertheindustrialtemperaturerangeof−40°Cto+85°C. Rev.0|Page3of48 AD9277 SPECIFICATIONS ACSPECIFICATIONS AVDD1=1.8V,AVDD2=3.0V,DRVDD=1.8V,1.0VinternalADCreference,fIN=5MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,PGAgain=24dB,GAIN−=0.8V,AAFLPFcutoff=fSAMPLE/4.5,HPFcutoff=LPFcutoff/20.7(default),fSAMPLE=50MSPS(Register0x02=0x01),fulltemperature,ANSI-644LVDSmode,unlessotherwisenoted. Table1. Parameter1 TestConditions/Comments Min LNACHARACTERISTICS Gain Single-endedinputtodifferentialoutput Single-endedinputtosingle-endedoutput InputVoltageRange(Single-Ended) LNAoutputlimitedto4.4Vp-pdifferentialoutput LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB InputCommonMode(LI-x,LG-x) OutputCommonMode(LO-x) OutputCommonMode(LOSW-x)Switchoff Switchon InputResistance(LI-x) RFB=250Ω RFB=500Ω RFB=∞ InputCapacitance(LI-x) −3dBBandwidth InputNoiseVoltage RS=0Ω,RFB=∞ LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB InputNoiseCurrent RFB=∞ 1dBInputCompressionPoint GAIN+=0V LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB NoiseFigure RS=50Ω ActiveTerminationMatched LNAgain=15.6dB,RFB=200Ω LNAgain=17.9dB,RFB=250Ω LNAgain=21.3dB,RFB=350Ω Unterminated LNAgain=15.6dB,RFB=∞ LNAgain=17.9dB,RFB=∞ LNAgain=21.3dB,RFB=∞ FULL-CHANNEL(TGC)CHARACTERISTICS AAFLow-PassCutoff InRange −3dB,programmable
8 InRangeAAFBandwidthTolerance GroupDelayVariation f=1MHzto18MHz,GAIN+=0Vto1.6V Input-ReferredNoiseVoltage GAIN+=1.6V,RFB=∞ LNAgain=15.6dB LNAgain=17.9dB LNAgain=21.3dB Typ Max 15.6/17.9/21.39.6/11.9/15.3 7335503671.01.5High-Z1.5501001522100 0.980.860.751 1.00.80.5 4.84.13.23.42.82.3 18±10 ±2 1.261.040.85 Unit dBdB mVp-pmVp-pmVp-pVVΩVΩΩkΩpFMHz nV/√HznV/√HznV/√HzpA/√Hz Vp-pVp-pVp-p dBdBdBdBdBdB MHz% ns nV/√HznV/√HznV/√Hz Rev.0|Page4of48 Parameter1NoiseFigureActiveTerminationMatched Unterminated CorrelatedNoiseRatioOutputOffsetSignal-to-NoiseRatio(SNR) HarmonicDistortionSecondHarmonic ThirdHarmonic Two-ToneIntermodulation(IMD3) Channel-to-ChannelCrosstalk Channel-to-ChannelDelayVariation PGAGainGAINACCURACY GainLawConformanceError LinearGainErrorChannel-to-ChannelMatchingGAINCONTROLINTERFACENormalOperatingRangeGainRangeScaleFactorResponseTimeGAIN+ImpedanceGAIN−ImpedanceCWDOPPLERMODELOFrequencyPhaseIncrementOutputDCBias(Single-Ended)MaximumOutputSwing Transconductance(Differential) Input-ReferredNoiseVoltage TestConditions/CommentsGAIN+=1.6V,RS=50ΩLNAgain=15.6dB,RFB=200ΩLNAgain=17.9dB,RFB=250ΩLNAgain=21.3dB,RFB=350ΩLNAgain=15.6dB,RFB=∞LNAgain=17.9dB,RFB=∞LNAgain=21.3dB,RFB=∞Nosignal,correlated/uncorrelated fIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6V fIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6VfIN=5MHzat−10dBFS,GAIN+=0VfIN=5MHzat−1dBFS,GAIN+=1.6VfRF1=5.015MHz,fRF2=5.020MHz,ARF1=0dB,ARF2=−20dB,GAIN+=1.6V,IMD3relativetoARF2fIN=5MHzat−1dBFSOverrangecondition2FullTGCpath,fIN=5MHz,GAIN+=0Vto1.6V Differentialinputtodifferentialoutput25°C0
C FullFull25°C25°
C FullFull25°C25°
C FullFull25°C25°
C FullFull25°C25°
C FullFull FullFull Min250 2501.21.21.20 2471.125 Typ Max Unit CMOS/LVDS/LVPECL 1.2201.5 mVp-pVkΩpF CMOS/LVDS/LVPECL 1.2201.5 mVp-pVkΩpF 3.6
V 0.3
V 30 kΩ 0.5 pF 3.6
V 0.3
V 70 kΩ 0.5 pF DRVDD+0.3V 0.3
V 30 kΩ
2 pF 1.79
V 0.05
V LVDS 454 mV 1.375
V Offsetbinary LVDS Full 150 250 mV Full 1.10 1.30
V Offsetbinary Full 0.05
V 1SeetheAN-835ApplicationNote,UnderstandingHighSpeedADCTestingandEvaluation,forpletesetofdefinitionsandinformationabouthowthesetestspleted. 2SpecifiedforLVDSandLVPECLonly.3Specifiedfor13SDIOpinssharingthesameconnection. Rev.0|Page7of48 AD9277 SWITCHINGSPECIFICATIONS AVDD1=1.8V,AVDD2=3.0V,DRVDD=1.8V,1.0VinternalADCreference,fIN=5MHz,fulltemperature,unlessotherwisenoted. Table3.Parameter1CLOCK2 ClockRateClockPulseWidthHigh(tEH)ClockPulseWidthLow(tEL)OUTPUTPARAMETERS2,3PropagationDelay(tPD)RiseTime(tR)(20%to80%)FallTime(tF)(20%to80%)FCOPropagationDelay(tFCO)DCOPropagationDelay(tCPD)4DCOtoDataDelay(tDATA)4DCOtoFCODelay(tFRAME)4Data-to-DataSkew(tDATA-MAX−tDATA-MIN)Wake-UpTime(Standby),GAIN+=0.5VWake-UpTime(Power-Down)PipelineLatency TemperatureMin Full 10 Full Full FullFullFullFullFullFullFullFull25°C25°CFull (tSAMPLE/2)+1.5 (tSAMPLE/2)+1.5(tSAMPLE/24)−300(tSAMPLE/24)−300 APERTURE ApertureUncertainty(Jitter) 25°
C LOGENERATION 4LOFrequency Full
4 LODividerRESETSetupTime5 Full
5 LODividerRESETHoldTime5 Full
5 LODividerRESETHighPulseWidth Full 20 Typ 1010 (tSAMPLE/2)+2.3300300(tSAMPLE/2)+2.3tFCO+(tSAMPLE/24)(tSAMPLE/24)(tSAMPLE/24)±100218 <
1 Max50 (tSAMPLE/2)+3.1(tSAMPLE/2)+3.1(tSAMPLE/24)+300(tSAMPLE/24)+300±350 40 Unit MHznsns nspspsnsnspspspsμsmsClockcycles psrms MHznsnsns 1SeetheAN-835ApplicationNote,UnderstandingHighSpeedADCTestingandEvaluation,forpletesetofdefinitionsandinformationabouthowthesetestswere completed.2CanbeadjustedviatheSPI.3MeasurementsweremadeusingapartsolderedtoFR-4material.4tSAMPLE/24isbasedonthenumberofbitsdividedby2becausethedelaysarebasedonhalfdutycycles.5RESETedgetorising4LOedge. Rev.0|Page8of48 ADCTIMINGDIAGRAMS N–1AIN CLK–CLK+DCO–DCO+FCO–FCO+DOUTx–DOUTx+ AIN tEHtCPDtFCOtPD N–
1 CLK–CLK+DCO–DCO+FCO–FCO+DOUTx–DOUTx+ tEHtCPDtFCOtPD NtEL AD9277 08181-002 tFRAME tDATAMSBD12D11D10D9D8D7D6D5D4D3D2D1D0MSBD12N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–7N–
7 Figure2.14-BitDataSerialStream(Default) NtEL tFRAME tDATALSBD0D1D2D3D4D5D6D7D8D9D10D11D12LSBD0N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–8N–7N–
7 Figure3.14-BitDataSerialStream,LSBFirst 08181-003 Rev.0|Page9of48 AD9277 ABSOLUTEMAXIMUMRATINGS Table4.ParameterAVDD1toGNDAVDD2toGNDDRVDDtoGNDGNDtoGNDAVDD2toAVDD1AVDD1toDRVDDAVDD2toDRVDDDigitalOutputs(DOUTx+,DOUTx−, DCO+,DCO−,FCO+,FCO−)toGNDCLK+,CLK−,SDIOtoGNDLI-x,LO-x,LOSW-xtoGNDCWI−,CWI+,CWQ−,CWQ+toGNDPDWN,STBY,SCLK,CSBtoGNDGAIN+,GAIN−,RESET,4LO+,4LO−, GPO0,GPO1,GPO2,GPO3toGNDRBIAS,VREFtoGNDOperatingTemperatureRange(Ambient)StorageTemperatureRange(Ambient)MaximumJunctionTemperatureLeadTemperature(Soldering,10sec) Rating−0.3Vto+2.0V−0.3Vto+3.9V−0.3Vto+2.0V−0.3Vto+0.3V−2.0Vto+3.9V−2.0Vto+2.0V−2.0Vto+3.9V−0.3Vto+2.0V −0.3Vto+2.0V−0.3Vto+3.9V−0.3Vto+3.9V−0.3Vto+2.0V−0.3Vto+3.9V −0.3Vto+2.0V−40°Cto+85°C−65°Cto+150°C150°C300°
C StressesabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thisisastressratingonly;functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability. THERMALIMPEDANCE Table5.AirflowVelocity(m/s)0.01.02.5 θJA1 θJB θJC Unit 20.3 °C/W 14.47.6 4.7 °C/W 12.9 °C/W 1θJAfora4-layerPCBwithsolidgroundplane(simulated).ExposedpadsolderedtoPCB. ESDCAUTION Rev.0|Page10of48 PINCONFIGURATIONANDFUNCTIONDESCRIPTIONS AD9277 100LOSW-E99LO-E98GND97GND96GND95CWQ+94CWQ–93CWI+92CWI–91AVDD290VREF89RBIAS88GAIN+87GAIN–86AVDD285AVDD2844LO+834LO–82RESET81GPO380GPO279GPO178GPO077LO-D76LOSW-
D LI-E1LG-E2AVDD23AVDD14LO-F5LOSW-F6 LI-F7LG-F8AVDD29AVDD110LO-G11LOSW-G12LI-G13LG-G14AVDD215AVDD116LO-H17LOSW-H18LI-H19LG-H20AVDD221AVDD122CLK–23CLK+24AVDD125 PIN1INDICATOR EXPOSEDPADDLE,PIN0(BOTTOMOFPACKAGE) AD9277 TOPVIEW(NottoScale) 75LI-D74LG-D73AVDD272AVDD171LO-C70LOSW-C69LI-C68LG-C67AVDD266AVDD165LO-B64LOSW-B63LI-B62LG-B61AVDD260AVDD159LO-A58LOSW-A57LI-A56LG-A55AVDD254AVDD153CSB52SDIO51SCLK DRVDD26DOUTH–27DOUTH+28DOUTG–29DOUTG+30DOUTF–31DOUTF+32DOUTE–33DOUTE+34 DCO–35DCO+36FCO–37FCO+38DOUTD–39DOUTD+40DOUTC–41DOUTC+42DOUTB–43DOUTB+44DOUTA–45DOUTA+46DRVDD47STBY48PDWN49AVDD150 08181-004 NOTES1.THEEXPOSEDPADSHOULDBETIEDTOAQUIETANALOGGROUND. Figure4.PinConfiguration Table6.PinFunctionDescriptions PinNo. Name 0,96,97,98 GND
1 LI-
E 2 LG-
E 3,9,15,21,55,61,67,73,85,86,91 AVDD2 4,10,16,22,25,50,54,60,66,72 AVDD1
5 LO-
F 6 LOSW-
F 7 LI-
F 8 LG-
F 11 LO-
G 12 LOSW-
G 13 LI-
G 14 LG-
G 17 LO-
H 18 LOSW-
H 19 LI-
H 20 LG-
H Description
Ground.Exposedpaddleshouldbetiedtoaquietanalogground.LNAAnalogInputforChannelE.LNAGroundforChannelE.3.0VAnalogSupply. 1.8VAnalogSupply. LNAAnalogInvertedOutputforChannelF.LNAAnalogSwitchedOutputforChannelF.LNAAnalogInputforChannelF.LNAGroundforChannelF.LNAAnalogInvertedOutputforChannelG.LNAAnalogSwitchedOutputforChannelG.LNAAnalogInputforChannelG.LNAGroundforChannelG.LNAAnalogInvertedOutputforChannelH.LNAAnalogSwitchedOutputforChannelH.LNAAnalogInputforChannelH.LNAGroundforChannelH. Rev.0|Page11of48 AD9277 PinNo.232426,472728293031323334353637383940414243444546484951525356575859626364656869707174757677787980818283848788 NameCLK−CLK+DRVDDDOUTH−DOUTH+DOUTG−DOUTG+DOUTF−DOUTF+DOUTE−DOUTE+DCO−DCO+FCO−FCO+DOUTD−DOUTD+DOUTC−DOUTC+DOUTB−DOUTB+DOUTA−DOUTA+STBYPDWNSCLKSDIOCSBLG-ALI-ALOSW-ALO-ALG-BLI-BLOSW-BLO-BLG-CLI-CLOSW-CLO-CLG-DLI-DLOSW-DLO-DGPO0GPO1GPO2GPO3RESET4LO−4LO+GAIN−GAIN+ DescriptionClockInputComplement.ClockInputTrue.1.8VDigitalOutputDriverSupply.ADCHDigitalOutputComplement.ADCHDigitalOutputTrue.ADCGDigitalOutputComplement.ADCGDigitalOutputTrue.ADCFDigitalOutputComplement.ADCFDigitalOutputTrue.ADCEDigitalOutputComplement.ADCEDigitalOutputTrue.DigitalClockOutputComplement.DigitalClockOutputTrue.DigitalFrameClockOutputComplement.DigitalFrameClockOutputTrue.ADCDDigitalOutputComplement.ADCDDigitalOutputTrue.ADCCDigitalOutputComplement.ADCCDigitalOutputTrue.ADCBDigitalOutputComplement.ADCBDigitalOutputTrue.ADCADigitalOutputComplement.ADCADigitalOutputTrue.StandbyPower-Down.FullPower-Down.SerialClock.SerialDataInput/Output.ChipSelectBar.LNAGroundforChannelA.LNAAnalogInputforChannelA.LNAAnalogSwitchedOutputforChannelA.LNAAnalogInvertedOutputforChannelA.LNAGroundforChannelB.LNAAnalogInputforChannelB.LNAAnalogSwitchedOutputforChannelB.LNAAnalogInvertedOutputforChannelB.LNAGroundforChannelC.LNAAnalogInputforChannelC.LNAAnalogSwitchedOutputforChannelC.LNAAnalogInvertedOutputforChannelC.LNAGroundforChannelD.LNAAnalogInputforChannelD.LNAAnalogSwitchedOutputforChannelD.LNAAnalogInvertedOutputforChannelD.General-PurposeOpen-DrainOutput0.General-PurposeOpen-DrainOutput1.General-PurposeOpen-DrainOutput2.General-PurposeOpen-DrainOutput3.ResetforSynchronizing4LODivide-by-4Counter.CWDoppler4LOInputComplement.CWDoppler4LOInputTrue.GainControlVoltageInputComplement.GainControlVoltageInputTrue. Rev.0|Page12of48 PinNo.89909293949599100 NameRBIASVREFCWI−CWI+CWQ−CWQ+LO-ELOSW-
E DescriptionExternalResistortoSettheInternalADCCoreBiasCurrent.VoltageReferenceInput/Output.CWDopplerIOutputComplement.CWDopplerIOutputTrue.CWDopplerQOutputComplement.CWDopplerQOutputTrue.LNAAnalogInvertedOutputforChannelE.LNAAnalogSwitchedOutputforChannelE. AD9277 Rev.0|Page13of48 AD9277 TYPICALPERFORMANCECHARACTERISTICS TGCMODE fSAMPLE=50MSPS,fIN=5MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,PGAgain=24dB,AAFLPFcutoff=fSAMPLE/4.5,HPFcutoff=LPFcutoff/20.7(default). 2.0 25 PERCENTAGEOFUNITS(%) GAINERROR(dB) 08181-005 1.5 201.0 0.5 –40°
C 15 +25°
C 0+85°
C –0.5 10 –1.05 –1.5 –2.00 0.20.40.60.81.01.21.41.6GAIN+(V) Figure5.GainErrorvs.GAIN+atThreeTemperatures
0 GAINERROR(dB) Figure8.GainErrorHistogram,GAIN+=1.44V 25 25 –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-008 20 20 PERCENTAGEOFUNITS(%) 08181-009 PERCENTAGEOFUNITS(%) 15 15 10 10
5 5 PERCENTAGEOFUNITS(%) 08181-010 PERCENTAGEOFUNITS(%) –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-007 –1.0–0.9–0.8–0.7–0.6–0.5–0.4–0.3–0.2–0.1 00.10.20.30.40.50.60.70.80.91.0 08181-006 0GAINERROR(dB) Figure6.GainErrorHistogram,GAIN+=0.16V 141210 86420 GAINERROR(dB) Figure7.GainErrorHistogram,GAIN+=0.8V 0–1.25–1.00–0.75–0.50–0.250 0.250.500.751.001.25 CHANNEL-TO-CHANNELGAINMATCHING(dB) Figure9.GainMatchHistogram,GAIN+=0.3V 25 20 15 10
5 Rev.0|Page14of48 0–1.25–1.00–0.75–0.50–0.250 0.250.500.751.001.25 CHANNEL-TO-CHANNELGAINMATCHING(dB) Figure10.GainMatchHistogram,GAIN+=1.3V NUMBEROFHITS NUMBEROFHITS 180,000160,000140,000120,000100,000 80,000 60,00040,000 20,0000–12–10–8–6–4–2024681012CODES Figure11.Output-ReferredNoiseHistogram,GAIN+=0.0V 70,000 60,000 50,000 40,00030,00020,000 10,000 0–35–30–25–20–15–10–505 CODES 101520 253035 Figure12.Output-ReferredNoiseHistogram,GAIN+=1.6V 2.0 1.8 1.6 1.4 LNAGAIN=15.6dB 1.2 LNAGAIN=17.9dB1.0 0.8 LNAGAIN=21.3dB 0.6 0.4 0.2
0 1
2 3
4 5
6 7
8 9 10 FREQUENCY(MHz) Figure13.Short-Circuit,Input-ReferredNoisevs.Frequency,PGAGain=30dB,GAIN+=1.6V 08181-013 AMPLITUDE(dBFS) 08181-012 SNR/SINAD(dBFS) 08181-011 OUTPUT-REFERREDNOISE(dBFS/Hz) AD9277 –126 –128 –130–132–134–136 LNAGAIN=21.3dBLNAGAIN=17.9dBLNAGAIN=15.6dB –138 –140 –1420 0.20.40.60.81.01.21.41.6GAIN+(V) Figure14.Short-Circuit,Output-ReferredNoisevs.GAIN+ 08181-014 64 62SNR 60 58 56 SINAD54 52 50 0.4 0.6 0.8 1.0 1.2 1.4 1.6 GAIN+(V) Figure15.SNR/SINADvs.GAIN+,AIN=−1.0dBFS 08181-015
0 –550MSPS –1040MSPS –15 –20 –250
5 10 15 20 25 30 35 40 FREQUENCY(MHz) Figure16.AntialiasingFilter(AAF)Pass-BandResponse,LPFCutoff=fSAMPLE/4.5 08181-016 INPUT-REFERREDNOISE(nV/Hz) Rev.0|Page15of48 08181-021 AD9277
0 SECOND-ORDERHARMONICDISTORTION(dBc) –10 –20 –30 –40GAIN+=0.4V –50 –60 GAIN+=1.0V –70–80GAIN+=1.6V –90
0 2
4 6
8 10 12 14 16 INPUTFREQUENCY(MHz) Figure17.Second-OrderHarmonicDistortionvs.Frequency,AIN=−1.0dBFS
0 THIRD-ORDERHARMONICDISTORTION(dBc) –10 –20 –30 –40GAIN+=0.4V –50GAIN+=1.6V –60 –70 GAIN+=1.0V–80 –90
0 2
4 6
8 10 12 14 16 INPUTFREQUENCY(MHz) Figure18.Third-OrderHarmonicDistortionvs.Frequency,AIN=−1.0dBFS SECOND-ORDERHARMONICDISTORTION(dBFS)
0 –20 –40 –60GAIN+=0V –80 –100 GAIN+=0.8V GAIN+=1.6V –120–50–45–40–35–30–25–20–15–10–50 ADCOUTPUTLEVEL(dBFS) Figure19.Second-OrderHarmonicDistortionvs.ADCOutputLevel 08181-020 IMD3(dBFS) 08181-019 IMD3(dBFS) 08181-018 THIRD-ORDERHARMONICDISTORTION(dBc)
0 –20 –40 –60 –80 GAIN+=1.6V GAIN+=0V –100 GAIN+=0.8V–120 –50–45–40–35–30–25–20–15–10–50ADCOUTPUTLEVEL(dBFS) Figure20.Third-OrderHarmonicDistortionvs.ADCOutputLevel 0fIN2=fIN1+0.01MHz –10fIN1=–1dBFS,fIN2=–21dBFS–20 –30 –40 –50 8MHz–60 2.3MHz5MHz –70 –80 –90 0.4 0.6 0.8 1.0 1.2 1.4 1.6 GAIN+(V) Figure21.IMD3vs.GAIN+ 0fIN1=5.00MHz,fIN2=5.01MHzFUND2LEVEL=FUND1LEVEL–20dB –20 –40 –60 GAIN+=0V GAIN+=1.6V –80 –100 GAIN+=0.8V –120 –40–35–30–25–20–15–10–
5 0 AMPLITUDELEVEL(dBFS) Figure22.IMD3vs.AmplitudeLevel 08181-022 08181-023 Rev.0|Page16of48 AD9277 CWDOPPLERMODE fRF=2.5MHzat−3dBFS,f4LO=10MHz,RS=50Ω,LNAgain=21.3dB,LNAbias=high,allCWchannelsenabled,phaserotation0°. QUADRATUREPHASEERROR(Degrees) 1.2 1.0 0.8 0.6 0.4 0.2
0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2100 1k 10k BASEBANDFREQUENCY(Hz) Figure23.QuadraturePhaseErrorvs.BasebandFrequency 08181-073 DYNAMICRANGE(dBFS/Hz) 175 170 CHA+B+C+D+E+F+G+
H CHA+B+C+
D 165 CHA+
B CHA160 155 150 1450 10002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure26.Small-SignalDynamicRange 08181-076 0.10 QUADRATUREAMPLITUDEIMBALANCE(dB) 0.08 0.06 0.04 0.02
0 –0.02 –0.04 –0.06 –0.08 08181-074 –0.10100 1k 10k BASEBANDFREQUENCY(Hz) Figure24.QuadratureAmplitudeImbalancevs.BasebandFrequency NOISEFIGURE(dB) 12 10 8 6 4 2 0010002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure27.NoiseFigurevs.BasebandFrequency 08181-077 OUTPUT-REFERREDSNR(dBc/Hz) 140 142 144 146 148 150 152 154 156 158 1kHzOFFSET 1605kHzOFFSET 162 164 166–20–18–16–14–12–10–8–6–4–20 INPUTLEVEL(dBFS) Figure25.Output-ReferredSNRvs.InputLevel 08181-075 OUTPUT-REFERREDSNR(dBc/Hz) 130 135 140 145 150 155 160 1650 10002000300040005000600070008000900010,000BASEBANDFREQUENCY(Hz) Figure28.Output-ReferredSNRvs.BasebandFrequency 08181-078 Rev.0|Page17of48 DYNAMICRANGE(dB) 08181-079 AD9277 170 168 166 LNAGAIN=15.6dB 164 LNAGAIN=17.9dB 162 LNAGAIN=21.3dB160 158 156 1541
2 3
4 5678910 RFFREQUENCY(MHz) Figure29.Small-SignalDynamicRangevs.RFFrequency Rev.0|Page18of48 EQUIVALENTCIRCUITS AVDD2VCM LI-x,LG-x 15kΩ 08181-024 Figure30.EquivalentLNAInputCircuit AVDD2 AVDD2 LO-x, 10Ω LOSW-x 08181-025 Figure31.EquivalentLNAOutputCircuit AVDD1 CLK+ 350Ω AVDD1 CLK– 350Ω 10kΩ1.25V 10kΩ Figure32.EquivalentClockInputCircuit AVDD2 4LO+ 350Ω AVDD2 4LO– 350Ω 10kΩ1.25V 10kΩ Figure33.Equivalent4LOInputCircuit 08181-027 08181-026 AD9277 AVDD SDIO 350Ω30kΩ Figure34.EquivalentSDIOInputCircuit 08181-028 DRVDD DRVDD DRVDD VDOUTx–
V VDOUTx+
V DRVDD DRVDD DRGND Figure35.EquivalentDigitalOutputCircuit 08181-029 AVDD1 SCLK,PDWN,ORSTBY 350Ω30kΩ 08181-030 Figure36.EquivalentSCLK,PDWN,orSTBYInputCircuit AVDD2 RESET 350Ω 08181-031 Rev.0|Page19of48 Figure37.EquivalentRESETInputCircuit AD9277 CSB AVDD1 AVDD1 350Ω70kΩ Figure38.EquivalentCSBInputCircuit 08181-034 VREF6kΩ Figure39.EquivalentVREFCircuit RBIAS 100Ω Figure40.EquivalentRBIASCircuit 08181-033 08181-032 AVDD250Ω GAIN+ 08181-035 Figure41.EquivalentGAIN+InputCircuit GAIN– AVDD250Ω 0.8V70kΩ 08181-036 08181-037 Figure42.EquivalentGAIN−InputCircuit AVDD2CWx+,CWx– Figure43.EquivalentCWI±,CWQ±OutputCircuit AVDD210Ω GPOx Figure44.EquivalentGPOxOutputCircuit 08181-038 Rev.0|Page20of48 THEORYOFOPERATION ULTRASOUND TheprimaryapplicationfortheAD9277ismedicalultrasound.Figure45showsasimplifiedblockdiagramofanultrasoundsystem.Acriticalfunctionofanultrasoundsystemisthetimegaincontrol(TGC)pensationforphysiologicalsignalattenuation.Becausetheattenuationofultrasoundsignalsisexponentialwithrespecttodistance(time),alinear-in-dBVGAistheoptimalsolution. Keyrequirementsinanultrasoundsignalchainareverylownoise,activeinputtermination,fastoverloadrecovery,lowpower,anddifferentialdrivetoanADC.Becauseultrasoundmachinesusebeamformingtechniquesrequiringlargebinary-weightednumbersofchannels(forexample,32to512),usingthelowestpoweratthelowestpossiblenoiseisofchiefimportance. AD9277 Mostmodernultrasoundmachinesusedigitalbeamforming.Inthistechnique,thesignalisconvertedtodigitalformatimmediatelyfollowingtheTGCamplifier,andthenbeamformingisplisheddigitally.TheADCresolutionof14bitswithupto50MSPSsamplingsatisfiestherequirementsofbothgeneral-purposeandhighendsystems.Powerconservationandlowcostaretwoofthemostimportantfactorsinlowendandportableultrasoundmachines,andtheAD9277isdesignedtomeetthesecriteria.Foradditionalinformationregardingultrasoundsystems,referto“HowUltrasoundSystemConsiderationsInfluenceFront-EndComponentChoice,”AnalogDialogue,Volume36,Number3,May–July2002,and“TheAD9271—ARevolutionarySolutionforPortableUltrasound,”AnalogDialogue,Volume41,Number7,July2007. TxHVAMPLIFIERS HVMUX/DEMUX TRANSDUCERARRAY 128,256,ETC.,ELEMENTS BIDIRECTIONALCABLE T/RSWITCHES TxBEAMFORMER LNA VGA AAF ADC BEAMFORMERCENTRALCONTROL MULTICHANNELS RxBEAMFORMER(BANDFMODES) CW(ANALOG)BEAMFORMER SPECTRALDOPPLERPROCESSING MODE IMAGEANDMOTION PROCESSING(BMODE) COLORDOPPLER(PW)PROCESSING (FMODE) 08181-039 AUDIOOUTPUT Figure45.SimplifiedUltrasoundSystemBlockDiagram DISPLAY Rev.0|Page21of48 AD9277 T/RSWITCHCS CSH TRANSDUCER RFB1RFB2 4LO–4LO+RESETLO-x LOSW-x
4 LOGENERATION LI-xLG-x CLG LNA 15.6dB,17.9dB,21.3dB ATTENUATOR–42dBTO0dB GAININTERPOLATOR POSTAMP 21dB,24dB,27dB,30dB X-AMPVGA GAIN+ GAIN– AAF Figure46.SimplifiedBlockDiagramofaSingleChannel PIPELINEADC SERIALLVDS CWI+CWI– CWQ+CWQ– DOUTx+DOUTx– 08181-040 CHANNELOVERVIEW EachchannelcontainsbothaTGCsignalpathandaCWDopplersignalpath.Commontobothsignalpaths,theLNAprovidesuseradjustableinputimpedancetermination.TheCWDopplerpathincludesanI/Qdemodulator.TheTGCpathincludesadifferentialX-AMP®VGA,anantialiasingfilter,andanADC.Figure46showsasimplifiedblockdiagramwithponents. Thesignalpathisfullydifferentialthroughouttomaximizesignalswingandreduceeven-orderdistortion;however,theLNAisdesignedtobedrivenfromasingle-endedsignalsource. LowNoiseAmplifier(LNA) GoodnoiseperformancereliesonaproprietaryultralownoiseLNAatthebeginningofthesignalchain,whichminimizesthenoisecontributioninthefollowingVGA.Activeimpedancecontroloptimizesnoiseperformanceforapplicationsthatbenefitfrominputimpedancematching. AsimplifiedschematicoftheLNAisshowninFigure47.LI-xiscapacitivelycoupledtothesource.Anon-chipbiasgeneratorestablishesdcinputbiasvoltagesofaround0.9Vandcentersthemon-modelevelsat1.5V(AVDD2dividedby2).Acapacitor,CLG,ofthesamevalueastheinputcouplingcapacitor,CS,isconnectedfromtheLG-xpintoground. ItishighlymendedthattheLG-xpinsformaKelvintypeconnectiontotheinputorprobeconnectionground.SimplyconnectingtheLG-xpintogroundnearthedevicecanallowdifferencesinpotentialtobeamplifiedthroughtheLNA.Thisgenerallyshowsupasadcoffsetvoltagethatcanvaryfromchanneltochannelandparttopart,dependingontheapplicationandthelayoutofthePCB. CFBVO+ T/RSWITCH CS VCMLI-xCSH TRANSDUCER RFB1RFB2 VO–LOSW-xLO-x VCM LG-x CLG 08181-041 Figure47.SimplifiedLNASchematic TheLNAsupportsdifferentialoutputvoltagesashighas4.4Vp-pwithpositiveandnegativeexcursionsof±1.1Vfrommonmodevoltageof1.5V.TheLNAdifferentialgainsetsthemaximuminputsignalbeforesaturation.OneofthreegainsissetthroughtheSPI.Thecorrespondingfull-scaleinputforthegainsettingsof15.6dB,17.9dB,and21.3dBis733mVp-p,550mVp-p,and367mVp-p,respectively.Overloadprotectionensuresquickrecoverytimefromlargeinputvoltages.Becausetheinputsarecapacitivelycoupledtoabiasvoltagenearmidsupply,verylargeinputscanbehandledwithoutinteractingwiththeESDprotection. Rev.0|Page22of48 Lowvaluefeedbackresistorsandthecurrent-drivingcapabilityoftheoutputstageallowtheLNAtoachievealowinputreferrednoisevoltageof0.75nV/√Hz(atagainof21.3dB).Thisisachievedwithacurrentconsumptionofonly27mAperchannel(80mW).On-chipresistormatchingresultsinprecisesingle-endedgains,whicharecriticalforurateimpedancecontrol.Theuseofafullyologyandnegativefeedbackminimizesdistortion.Lowsecond-orderharmonicdistortionisparticularlyimportantinsecondharmonicultrasoundimagingapplications.Differentialsignalingenablessmallerswingsateachoutput,furtherreducingthird-orderharmonicdistortion. ActiveImpedanceMatching TheLNAconsistsofasingle-endedvoltagegainamplifierwithdifferentialoutputsandthenegativeoutputexternallyavailable.Forexample,withafixedgainof8×(17.9dB),anactiveinputterminationissynthesizedbyconnectingafeedbackresistorbetweenthenegativeoutputpin,LO-x,andthepositiveinputpin,LI-x.Thiswell-knowntechniqueisusedforinterfacingmultipleprobeimpedancestoasinglesystem.TheinputresistanceisshowninEquation1. R=RFB
(1) IN(1+A2) where:A/2isthesingle-endedgainorthegainfromtheLI-xinputstotheLO-xoutputs.RFBistheresultingimpedanceoftheRFB1andbination(seeFigure47). Becausetheamplifierhasagainof8×fromitsinputtoitsdifferentialoutput,itisimportanttonotethatthegainA/2isthegainfromPinLI-xtoPinLO-xandthatitis6dBlessthanthegainoftheamplifier,or11.9dB(4×).Theinputresistanceisreducedbyaninternalbiasresistorof15kΩinparallelwiththesourceresistanceconnectedtoPinLI-x,withPinLG-xacgrounded.Equation2canbeusedtocalculatetherequiredRFBforadesiredRIN,evenforhighervaluesofRIN. RIN=(1R+FB3)||15kΩ
(2) Forexample,tosetRINto200Ω,thevalueofRFBmustbe1000Ω.Ifthesimplifiedequation(Equation2)isusedtocalculateRIN,thevalueis188Ω,resultinginagainerroroflessthan0.6dB.Somefactors,suchasthepresenceofadynamicsourceresistance,mayinfluencetheabsolutegainuracymoresignificantly.Athigherfrequencies,theinputcapacitanceoftheLNAmustbeconsidered.TheusermustdeterminethelevelofmatchinguracyandadjustRFBordingly. AD9277 Thebandwidth(BW)oftheLNAisgreaterthan100MHz.Ultimately,theBWoftheLNAlimitstheuracyofthesynthesizedRIN.ForRIN=RSuptoabout200Ω,thebestmatchisbetween100kHzand10MHz,wherethelowerfrequencylimitisdeterminedbythesizeoftheaccouplingcapacitors,andtheupperlimitisdeterminedbytheLNABW.Furthermore,theinputcapacitanceandRSlimittheBWathigherfrequencies.Figure48showsRINvs.frequencyforvariousvaluesofRFB. 1kRS=500Ω,RFB=2kΩ RS=200Ω,RFB=800Ω RS=100Ω,RFB=400Ω,CSH=20pF100 RS=50Ω,RFB=200Ω,CSH=70pF INPUTRESISTANCE(Ω) 08181-042 10100k 1M 10M FREQUENCY(Hz) 100M Figure48.RINvs.FrequencyforVariousValuesofRFB(EffectsofRSandCSHAreAlsoShown) NotethatatthelowestvalueofRIN(50Ω),RINpeaksatfrequenciesgreaterthan10MHz.ThisisduetotheBWroll-offoftheLNA,asmentionedpreviously. However,ascanbeseenforlargerRINvalues,parasiticcapacitancestartsrollingoffthesignalBWbeforetheLNAcanproducepeaking.CSHfurtherdegradesthematch;therefore,CSHshouldnotbeusedforvaluesofRINthataregreaterthan100Ω.Table7liststhemendedvaluesforRFBandCSHintermsofRIN. CFBisneededinserieswithRFBbecausethedclevelsatPinLO-xandPinLI-xareunequal. Table7.ActiveTerminationExternalComponentValues LNAGain(dB) RIN(Ω) RFB(Ω) MinimumCSH(pF)BW
(MHz) 15.6 50 200 90 57 17.9 50 250 70 69 21.3 50 350 50 88 15.6 100 400 30 57 17.9 100 500 20 69 21.3 100 700 10 88 15.6 200 800 N/A 72 17.9 200 1000 N/A 72 21.3 200 1400 N/A 72 Rev.
0|Page23of48 AD9277 LNANoise Theshort-circuitnoisevoltage(input-referrednoise)isanimportantlimitonsystemperformance.Theshort-circuitnoisevoltagefortheLNAis0.75nV/√Hzatagainof21.3dB,includingtheVGAnoiseataVGApostampgainof27dB.Thesemeasurements,whichweretakenwithoutafeedbackresistor,providethebasisforcalculatingtheinputnoiseandnoisefigure(NF)performanceoftheconfigurationsshowninFigure49. UNTERMINATED RINRS +LI-x – VOUT +LI-x – RESISTIVETERMINATIONRIN RS RS VOUT +LI-x – ACTIVEIMPEDANCEMATCH RIN RFB RS VOUT 08181-043 RFBRIN=1+A/2 Figure49.InputConfigurations Figure50andFigure51aresimulationsofnoisefigurevs.RSresultsusingtheseconfigurationsandaninput-referrednoisevoltageof3.8nV/√HzfortheVGA.Unterminated(RFB=∞)operationexhibitsthelowestequivalentinputnoiseandnoisefigure.Figure51showsthenoisefigurevs.sourceresistancerisingatlowRS—wheretheLNAvoltagenoiseisparedwiththesourcenoise—andathighRSduetothenoisecontributionfromRFB.ThelowestNFisachievedwhenRSmatchesRIN. Themainpurposeofinputimpedancematchingistoimprovethetransientresponseofthesystem.Withresistivetermination,theinputnoiseincreasesduetothethermalnoiseofthematchingresistorandtheincreasedcontributionoftheLNA’sinputvoltagenoisegenerator.Withactiveimpedancematching,however,thecontributionsofbotharesmaller(byafactorof1/(1+LNAgain))thantheywouldbeforresistivetermination. Figure50showstherelativenoisefigureperformance.WithanLNAgainof21.3dB,theinputimpedancewassweptwithRStopreservethematchateachpoint.Thenoisefiguresforasourceimpedanceof50Ωare7.3dB,4.2dB,and2.8dBfortheresistivetermination,activetermination,andunterminatedconfigurations,respectively.Thenoisefiguresfor200Ωare4.5dB,1.7dB,and1.0dB,respectively. Figure51showsthenoisefigureasitrelatestoRSforvariousvaluesofRIN,whichishelpfulfordesignpurposes. 12.0 10.5 NOISEFIGURE(dB) 9.0RESISTIVETERMINATION 7.5 6.0 4.5 3.0 UNTERMINATED1.5 ACTIVETERMINATION 08181-0440 10 100 1k RS(Ω) Figure50.NoiseFigurevs.RSforResistiveTermination,ActiveTerminationMatched,andUnterminatedInputs,VGAIN=0.8V NOISEFIGURE(dB)
8 7 RIN=50Ω RIN=75Ω RIN=100Ω
6 RIN=200Ω UNTERMINATED
5 4
3 2
1 0 10 100 1k RS(Ω) Figure51.NoiseFigurevs.RSforVariousFixedValuesofRIN,ActiveTerminationMatchedInputs,VGAIN=0.8V 08181-045 Rev.0|Page24of48 INPUTOVERDRIVE Excellentoverloadbehaviorisofprimaryimportanceinultrasound.BoththeLNAandVGAhavebuilt-inoverdriveprotectionandquicklyrecoverafteranoverloadevent. InputOverloadProtection Aswithanyamplifier,voltageclampingpriortotheinputsishighlymendediftheapplicationissubjecttohightransientvoltages. Figure52showsasimplifiedultrasoundtransducerinterface.montransducerelementservesthedualfunctionsoftransmittingandreceivingultrasoundenergy.Duringthetransmittingphase,highvoltagepulsesareappliedtotheceramicelements.Atypicaltransmit/receive(T/R)switchcanconsistoffourhighvoltagediodesinabridgeconfiguration.Althoughthediodesideallyblocktransmitpulsesfromthesensitivereceiverinput,diodecharacteristicsarenotideal,andtheresultingleakagetransientsimposedontheLI-xinputscanbeproblematic. Becauseultrasoundisapulsesystemandtime-of-flightisusedtodeterminedepth,quickrecoveryfrominputoverloadsisessential.OverloadcanurinthepreamplifierandintheVGA.Immediatelyfollowingatransmitpulse,thetypicalVGAgainsarelow,andtheLNAissubjecttooverloadfromT/Rswitchleakage.Withincreasinggain,theVGAcaneoverloadedduetostrongechoesthaturnearfieldechoesandacousticallydensematerials,suchasbone. Figure52illustratesanexternaloverloadprotectionscheme.Apairofback-to-backsignaldiodesshouldbeinplacepriortotheaccouplingcapacitors.Keepinmindthatalldiodesarepronetoexhibitingsomeamountofshotnoise.Manytypesofdiodesareavailableforachievingthedesirednoiseperformance.TheconfigurationshowninFigure52tendstoadd2nV/√Hzofinput-referrednoise.Decreasingthe5kΩresistorandincreasingthe2kΩresistormayimprovenoisecontribution,dependingontheapplication.WiththediodesshowninFigure52,clampinglevelsof±0.5Vorlesssignificantlyenhancetheoverloadperformanceofthesystem. +5V TxDRIVER 5kΩHV AD9277 10nF 08181-046 LNA 2kΩ5kΩ TRANSDUCER–5V 10nF Figure52.InputOverloadProtection AD9277 CWDOPPLEROPERATION EachchanneloftheAD9277includesanI/Qdemodulator.Eachdemodulatorhasanindividualprogrammablephaseshifter.TheI/Qdemodulatorisidealforphasedarraybeamformingapplicationsinmedicalultrasound.Eachchannelcanbeprogrammedfor16delaystates(360°/16or22.5°/step),selectableviatheSPIport.TheparthasaRESETinputusedtosynchronizetheLOdividersofeachchannel.IfmultipleAD9277sareused,monRESETacrossthearrayensuressynchronizedphaseforallchannels.InternaltotheAD9277,theindividualchannelIandQoutputsarecurrentsummed.IfmultipleAD9277sareused,theIandQoutputsfromeachAD9277canbecurrentsummedandconvertedtoavoltageusinganexternaltransimpedanceamplifier. QuadratureGeneration Theinternal0°and90°LOphasesaredigitallygeneratedbyadivide-by-4logiccircuit.Thedividerisdc-coupledandinherentlybroadband;themaximumLOfrequencyislimitedonlybyitsswitchingspeed.ThedutycycleofthequadratureLOsignalsisintrinsically50%andisunaffectedbytheasymmetryoftheexternallyconnected4LOinput.Furthermore,thedividerisimplementedsuchthatthe4LOsignalreclocksthefinalflipflopsthatgeneratetheinternalLOsignalsandtherebyminimizesnoiseintroducedbythedividecircuitry. Foroptimumperformance,the4LOinputisdrivendifferentially,asdoneontheAD9277evaluationboard.mon-modevoltageoneachpinisapproximately1.2Vwiththenominal3
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