VINVoltageRange:3Vto5.5V◼VLDOINVoltageRange:1Vto3.5V◼VOUTMinimumOutputVoltage:0.5V◼InputVoltageTrackingfrom½×REFIN◼2-ASinkandSourceCurrentCapabilityforDDR
Termination◼IntegratedPowerMOSFETs◼OutputRemoteSensing◼FastLoad-TransientResponse◼BuiltinSoft-StartandUVLO,CurrentLimitandThermal
ShutdownProtection◼SupportDDR,DDR2,DDR3,DDR3L,LowPowerDDR3
andDDR4VTTPowerSupplyApplications◼OperatingTemperatureRange:–40°Cto+125°C◼SmallPackagewith2×2DFN-10◼Pb−FreeandareRoHSCompliant
Applications
◼MemoryVTTRegulatorforDDR,DDR2,DDR3,DDR3L,LowPowerDDR3andDDR4
◼Notebooks,s,andWorkstations◼Servers,NetworkingequipmentandDatacenters◼andBaseStation
TPL51206Series
2-ASinkandSourceDDRTerminationRegulator
Description
WiththedevelopmentofmainprocessorsinPCsandservers,moreandmoresourcedouble-data-rate(DDR)memoriesarerequiredinthemainboard,wheretheinputvoltageeslowerandlower,andspacelimitationeshigherandhigher.
TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplicationswithheavyspacelimitation.TheTPL51206seriesdevicesimplementafastload-transientresponseandonlyrequiresaminimumoutputcapacitanceof10μ
F. TheTPL51206seriesdevicessupportaremote-sensingfunctionandallpowerrequirementsforDDRVTTbustermination.Inaddition,theTPL51206seriesdevicesprovideS3andS5controlpinscanbeusedtocontrolthepowerstateinDDRapplications,settingOUTtohigh-impedanceinS3state(suspendtoRAM)anddischargingOUTandREFOUTinS4orS5state(suspendtodisk). TheTPL51206seriesdevicesareavailableinthethermallyefficient10-pin2×2DFNpackagewiththermalpad,andsupporttheoperatingtemperaturerangefrom–40°Cto+125°
C. VDDQ=1.2VVTT=0.6V TypicalApplicationSchematic 10μF10μ
F 1REFIN2LDOIN IN10 TPL51206 S59GND8 3OUT4PGND S37REFOUT6 5OUTSNS 1μF0.1μ
F VIN=3Vto5.5V S5SignalS3SignalVTTREF=0.6V 1/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ProductFamilyTable PartNumberTPL51206 OutputCurrent2A OrderableNumberTPL51206-DFFR Package2×2DFN-10 TransportMedia,Quantity3,000 MSLMSL3 Markinginformation206 2/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TableofContents Features
6 AbsoluteMaximumRatings
8 − Groundreferencepin.ConnectGNDpintoPCBgroundplanedirectly. Regulatorpowersupplyinputpin.A1-μForlargerceramiccapacitorfromINtoground(ascloseas IN 10
I possibletoINpin)isrequiredtoreducethejitterfromprevious-stagepowersupply. LDOIN
2 I LDOpowersupplyinputpin. OUT LDOoutputvoltagepin.Totalcapacitanceof10-μForlargerfromOUTtoground(ascloseaspossible
3 O toOUTpin)isrequiredtoensureregulatorstability. OUTSNS
5 LDOoutputvoltagesensepin.ConnectSNStotheremoteDDRterminationbypasscapacitorstogetI urateremotefeedbacksensingofOUTvoltage. PGND
4 − Powergroundpin.ConnectPGNDpintoPCBgroundplanedirectly. REFIN
1 I ReferenceinputforREFOUTpin.An1/2resistordividerisintegratedinternally. REFOUT
6 OReferenceoutputpin.Connecttogroundthrougha0.1-μFto1-μFceramiccapacitor. S3
7 I S3signalinputpin. S5
9 I S5signalinputpin.
(1)ExposedPADmustbeconnectedtoalarge-areagroundplanetomaximumthethermalperformance. 5/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator Specifications AbsoluteMaximumRatings MIN IN,LDOIN,REFIN,S3,S5 –0.3 PGNDtoGND –0.3 OUT,OUTSNS,REFOUT –0.3 TJ JunctionTemperatureRange –40 TSTG StorageTemperatureRange –55 TL LeadTemperature(Soldering10sec)
(1)StressesbeyondtheAbsoluteMaximumRatingsmaypermanentlydamagethedevice.
(2)AllvoltagevaluesarewithrespecttoGND. ESDRatings HBMCDM HumanBodyModelESDChargedDeviceModelESD ConditionANSI/ESDA/JEDECJS-001ANSI/ESDA/JEDECJS-002 mendedOperatingConditions MIN IN Regulatorinputvoltage
3 LDOIN LDOinputvoltage –0.1 REFIN LDOinputsensevoltage –0.1 S3,S5 S3,S5signalinputvoltage –0.1 OUT LDOoutputvoltage –0.1 OUTSNS LDOoutputsensevoltage –0.1 REFOUT Referenceoutputvoltage –0.1 PGND PowergroundvoltagetoGND –0.1 TJ JunctionTemperatureRange –40 ThermalInformation PACKAGE2×2DFN-10 θJA67.8 θJC,Bottom13.2 MAX60.33.6 150150260 UNITVVV°C°C°
C MinimumLevel Unit ±2000
V ±1500
V MAX5.53.53.55.53.53.53.50.1125 UNITVVVVVVVV°
C UNIT°C/W 6/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ElectricalCharacteristics TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SupplyInputVoltageandCurrent VIN Inputsupplyvoltagerange
3 5.5
V VLDOIN LDOinputvoltagerange 3.5
V VIN_UVLO UndervoltagelockoutofINHysteresis TA=25°
C,VINrising 2.9
3 V 180 mV IIN_S0IIN_S3IIN_SDILDOIN_S0ILDOIN_S3ILDOIN_SD InputsupplycurrentofIN,S0InputsupplycurrentofIN,S3ShutdowncurrentofIN,S4orS5InputcurrentofLDOIN,S0InputcurrentofLDOIN,S3ShutdowncurrentofLDOIN,S4orS5 TA=25°
C,VS3=VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=0V,VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=0V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=0V,VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=0V,VLDOIN=VREFIN=1.8V,IOUT=0mA 0.89 mA 0.34 mA 0.1
5 µ
A 2 10 µ
A 2 10 µ
A 0.2
5 µ
A ReferenceInputandOutput IREFIN InputcurrentofREFIN VREFIN=1.8V 30 µ
A VREFOUT Referenceoutputvoltage VREFINV2 VREFOUT_TOL ToleranceofREFOUTtoREFIN |IREFOUT|≤10mA,1.2V≤VREFIN≤1.8V|IREFOUT|≤100µA,1.2V≤VREFIN≤1.8V 49%49% 51%51% IREFOUT_SRCSourcecurrentlimitofREFOUTVREFIN=1.8V,VREFOUT=0V 10 mA IREFOUT_SNKSinkcurrentlimitofREFOUT VREFIN=0V,VREFOUT=1.8V 10 mA IREFOUT_DIS DischargecurrentofREFOUT TA=25°
C,VS3=VS5=0V,VREFOUT=0.5V
8 mA RegulatedOutputVoltageandCurrent |IOUT|≤10mA,1.2V≤VREFIN≤1.8V −20 VOUT Outputvoltage,VOUT=VREFIN |IOUT|≤1A,1.2V≤VREFIN≤1.8V −30
2 |IOUT|≤2A,1.2V≤VREFIN≤1.8V −40 20 mV 30 mV 40 mV IOUT_SRC SourcecurrentlimitofOUT VREFIN=1.8V,VOUT=VOUTSNS=0.7V
2 A IOUT_SNK SinkcurrentlimitofOUT VREFIN=1.8V,VOUT=VOUTSNS=1.1V
2 A IOUT_LKG LeakagecurrentofOUT TA=25°
C,VS3=0V,VS5=5V,VOUT=VREFOUT
1 10 µ
A IOUT_DIS DischargecurrentofOUT TA=25°
C,VS3=VS5=VREFIN=0V,VOUT=0.5V 50 mA IOUTSNS_BIASInputbiascurrentofOUTSNS VS3=VS5=5V,VOUTSNS=VREFOUT −0.1 0.1 µ
A IOUTSNS_LKGLeakagecurrentofOUTSNS VS3=0V,VS5=5V,VOUTSNS=VREFOUT −0.1 0.1 µ
A 7/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ElectricalCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. S3andS5 VIH High-levelinputofS3andS5 1.7
V VIL Low-levelinputofS3andS5 0.5
V VHL_SYS HysteresisofS3andS5 0.3
V IHL_LKG LeakagecurrentofS3andS5 –
1 1 µ
A TemperatureRange Thermalshutdownthreshold Temperatureincreasing TSDHysteresis 160 °
C 20 °
C 8/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. VINSupplyCurrent(mA) 5 4 3 2 1 0-40-25-105203550658095110125JunctionTemperature(°C) VINSupplyCurrent(µA) 800700600500400300200100 0-40-25-105203550658095110125JunctionTemperature(°C) VLDOIN=1.8V S3=S5=5V S0 Figure1VINSupplyCurrentvs.JunctionTemperature
5 VINShutdownCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=0V,S5=5V S3 Figure2VINSupplyCurrentvs.JunctionTemperature
5 VLDOINSupplyCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=S5=0V S4orS5 Figure3VINShutdownCurrentvs.JunctionTemperature
5 VLDOINSupplyCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=S5=5V S0 Figure4VLDOINSupplyCurrentvs.JunctionTemperature
5 VLDOINShutdownCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=0V,S5=5V S3 Figure5VLDOINSupplyCurrentvs.JunctionTemperature VLDOIN=1.8V S3=S5=0V S4orS5 Figure6VLDOINShutdownCurrentvs.JunctionTemperature 9/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. 0.9200.910 −40°C25°C85°
C 0.7700.760 −40°C25°C85°
C 0.900 0.750 OutputVoltage(V) OutputVoltage(V) 0.890 0.740 0.880 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.8VFigure7OUTLoadRegulation DDR2 0.6950.685 −40°C25°C85°
C 0.675 0.730 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.5VFigure8OUTLoadRegulation DDR3 0.6200.6100.600 −40°C25°C85°
C OutputVoltage(V) OutputVoltage(V) 0.665 0.590 0.655 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.35VFigure9OUTLoadRegulation DDR3L 0.9200.910 −40°C25°C85°
C 0.900 0.580 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.2V LPDDR3orDDR4 Figure10OUTLoadRegulation 0.7700.760 −40°C25°C85°
C 0.750 REFOUTOutputVoltage(V) REFOUTOutputVoltage(V) 0.890 0.740 0.880 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.8V DDR2 Figure11REFOUTLoadRegulation 0.730 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.5V DDR3 Figure12REFOUTLoadRegulation 10/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. 0.6950.685 −40°C25°C85°
C 0.6200.610 −40°C25°C85°
C 0.675 0.600 REFOUTOutputVoltage(V)REFOUTOutputVoltage(V) 0.665 0.590 0.655 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.35V DDR3L Figure13REFOUTLoadRegulation 0.580 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.2V LPDDR3orDDR4 Figure14REFOUTLoadRegulation S3REFOUT 2V/div500mV/div VLDOIN=1.8V S3EnableFigure15PowerUp OUT 10μs/div20mV/div IOUT 2A2A 2A/div REFOUTOUTS5 200mV/div 200mV/div2V/div VLDOIN=1.8V S5DisableFigure16PowerDown 50μs/div OUT IOUT 2A2A 20mV/div2A/div VLDOIN=1.8V OUT=0.9VFigure17LoadTransient 500μs/div VLDOIN=1.2V OUT=0.6VFigure18LoadTransient 500μs/div 11/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. REFOUTOUT 500mV/div500mV/div REFOUTOUT 500mV/div500mV/div OutputVoltage(V)OutputVoltage(V) IOUT 5A/div VLDOIN=1.8V OUT=0.9V 20μs/div Figure19OutputShort-to-GNDProtection
1 0.9 −40°
C 0.8 25°
C 0.7 85°
C 0.6 125°
C 0.5 0.4 0.3 0.2 0.1
0 2.5 2.6 2.7 2.8 2.9
3 Input
Voltage(V) Figure21VINUVLORising IOUT 5A/div VLDOIN=1.2V OUT=0.6V 20μs/div Figure20OutputShort-to-GNDProtection
1 0.9 −40°
C 0.8 25°
C 0.7 85°
C 0.6 125°
C 0.5 0.4 0.3 0.2 0.1
0 2.5 2.6 2.7 2.8 2.9
3 Input
Voltage(V) Figure22VINUVLOFalling 12/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator DetailedDescription Overview TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplicationswithheavyspacelimitation.TheTPL51206seriesdevicesimplementafastload-transientresponseandonlyrequiresaminimumoutputcapacitanceof10μ
F.TheTPL51206seriesdevicessupportaremote-sensingfunctionandallpowerrequirementsforDDRVTTbustermination.Inaddition,theTPL51206seriesdevicesprovideS3andS5controlpinscanbeusedtocontrolthepowerstateinDDRapplications,settingOUTtohigh-impedanceinS3state(suspendtoRAM)anddischargingOUTandREFOUTinS4orS5state(suspendtodisk). FunctionalBlockDiagram LDOININS3S5 REFINGND UVLO AMP S3ControlS5Control RegulationControl OUTDischarge BUF BUF TemperatureControl OUTDischarge AMP REFOUTDischarge OUTOUTSNS PGNDREFOUT Figure23FunctionalBlockDiagram FeatureDescription SinkandSourceRegulator(OUTandOUTSNS) TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplicationswithheavyspacelimitation.TheTPL51206seriesintegrateahigh-performance,low-dropoutlinearregulatorwithfast-feedbackloopthatcansupportfastloadtransientresponsewithsmallceramiccapacitors.Togettightregulationtolerance,theremotesensingpin,OUTSNSpin,mustbeconnectedtoOUTpinthroughaseparatetracefromhighcurrentpath. VoltageReference(LDOIN,REFINandREFOUT) TheTPL51206seriesusesthevoltageattheREFINpinasthereferenceinput,andthereferenceoutputattheREFOUTpinexactlyfollowthe1⁄2×VREFINwithinthetoleranceofVREFOUT_TOL.WhentheTPL51206seriesareconfiguredforstandardDDRapplications,theLDOINpinandtheREFINpinaredirectlyconnectedwithinputvoltagerangefrom1Vto3.5V,andthevoltageattheREFINpinisdividedbyhalfthroughaninternalresistordivider.TheREFOUTpinoftheTPL51206seriesimplementaminimum10mAofsinkorsourcecurrentcapability.Duringnormaloperation,theREFOUTpincannotbeopen,anda0.1-μFto1-μFX5Rorbetterceramiccapacitorisrequiredforstableoperation. INUnder-voltageLockout TheTPL51206seriesuseanunder-voltagelockoutcircuittokeeptheregulatorshutoffuntilINvoltageexceedstherisingUVLO 13/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator thresholdofIN. S3andS5Control TheTPL51206seriesintegratetheS3andS5pinstocontrolthedevicestate.Table1showsthedevicestatewithdifferentS3andS5logicbination,andthecorrespondingstatusofREFOUTandOUT. Table1S3andS5ControlTable STATE S3 S5 REFOUT OUT S0 HIGH HIGH ON ON S3 LOW HIGH ON OFF(High-Z) S4,S5 LOW LOW OFF(Discharge) OFF(Discharge) •InS4orS5state,S3=S5=LOW,alltheoutputsareturn-offanddischargetopowerground.•InS3state,S3=LOWandS5=HIGH,theOUTpinisturn-offinhigh-impedancestate.•InS0state,S3=S5=HIGH,thedeviceinnormaloperationmode. PowerSequenceControl ItismendedtopowerupandpowerdowntheTPL51206serieswiththepowersequenceshowedinFigure24. VIN VLDOIN=VREFIN S5 S3 VREFOUT VOUT Figure24PowerUpandDownSequenceControl OUTOver-CurrentProtection TheTPL51206seriesintegrateaconstantover-currentprotection.Whentheabsolutevalueofoutputsinkorsourcecurrentisgreaterthan2A,thecurrentislimitedtoIOUT_SNKorIOUT_SRC,andtheoutputvoltageisoutofregulation. Over-TemperatureProtection Themendedoperatingjunctiontemperaturerangeis–40°Cto125°
C.Whenthejunctiontemperatureisbetween125°Candthethermalshutdown(TSD)threshold,theregulatorcanstillworkwell,butitwillreducethedevicelifetimeforlong-termusing.Theover-temperatureprotectionworkswhenthejunctiontemperatureexceedsthethermalshutdown(TSD)threshold,whichturnsofftheregulatorimmediately.Untilwhenthedevicecoolsdownandthejunctiontemperaturefallsbelowthethermalshutdownthresholdminusthermalshutdownhysteresis,theregulatorturnsonagain. 14/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ApplicationandImplementation NOTEInformationinthefollowingapplicationssectionsisnotpartofthe3PEAK’ponentspecificationand3PEAKdoesnotwarrantitsuracypleteness.3PEAK’scustomersareresponsiblefordeterminingsuitabilityponentsfortheirpurposes.Customersshouldvalidateandtesttheirdesignimplementationtoconfirmsystemfunctionality. ApplicationInformation TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplications.ThefollowingapplicationschematicshowsatypicalusageoftheTPL51206series. TypicalApplication AdjustableOutputOperation Figure25showsthetypicalapplicationschematicoftheTPL51206seriesinDDR4applications. VDDQ=1.2V 10μ
F 1REFIN2LDOIN IN101μ
F VIN=3Vto5.5V VTT=0.6V 10μ
F TPL51206 S59GND8 3OUT4PGND S37REFOUT6 0.1μ
F S5Signal S3SignalVTTREF=0.6V 5OUTSNS Figure25TypicalApplicationSchematic INInputCapacitor 3PEAKmendsplacinga1-μForgreatercapacitorwitha0.1-μFbypasscapacitorinparallelclosetoINpintokeeptheinputvoltagestable.Thevoltageratingofthecapacitorsmustbegreaterthanthemaximuminputvoltage. LDOINInputCapacitor 3PEAKmendsplacinga10-μForgreatercapacitorwitha0.1-μFbypasscapacitorinparallelclosetoLDOINpintokeepthevoltagestableduringtransient.MoreinputcapacitorsarerequirediftherearelargeoutputcapacitorsusedattheOUTpin.ItissuggestedtoplaceinputcapacitorswithahalfoftheoutputcapacitancevalueattheLDOINpin. OutputCapacitor Toensurestableoperation,theTPL51206seriesrequiresoutputcapacitorsof10μForgreater.3PEAKmendsselectingX5RorX7R-typeceramiccapacitorwithminimumequivalentseriesresistance(ESR)andequivalentseriesinductance(ESL).TheoutputcapacitorsmustbeplacedasclosetotheOUTpinaspossible. PowerDissipation Duringnormaloperation,LDOjunctiontemperatureshouldnotexceed125°
C.Usingbelowequationstocalculatethepowerdissipationandestimatethejunctiontemperature. ThepowerdissipationcanbecalculatedusingEquation1. 15/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator PD=(VIN−VOUT)IOUT+VINIGND
(1) ThejunctiontemperaturecanbeestimatedusingEquation2.θJAisthejunction-to-ambientthermalresistance. TJ=TA+PDJA
(2) LayoutRequirements •Bothinputcapacitorsandoutputcapacitorsmustbeplacedasclosetothedevicepinsaspossible.•Suggestbypasstheinputpintogroundwitha0.1μFbypasscapacitor.Theloopareaformedbythebypasscapacitor connection,voltageinputpinandthegroundpinofthesystemmustbeassmallaspossible.•SuggestusewidetracelengthsorthickcopperweighttominimizeI×Rdropandheatdissipation.•TheGNDpinandthePGNDpinmustbeconnectedtothethermalpadwithmultiplethermalviasasmanyaspossible connectedtotheinternalgroundplanes. 16/18 Rev.A.0 TapeandReelInformation TPL51206Series 2-ASinkandSourceDDRTerminationRegulator OrderNumberTPL51206-DFFR Package2×2DFN-10 D1(mm)180 W1(mm)13.1 A0(mm) 2.3 B0(mm) 2.3 K0(mm) 1.1 P0(mm)
4 W0(mm)
8 Pin1Quadrant Q2 17/18 Rev.A.0 PackageOutlineDimensions 2×2DFN-10 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator
D PIN1#LaserMark
1 2 TOPVIEW SIDEVIEW A1
A E KE2
L b1 b EXPOSEDTHERMALPADZONE D2R h e
2 1 Ne BOTTOMVIEW SYMBOL AA1bb1cDD2eNeEE2 L hRK L/F载体尺寸 MILLIMETER MINNOMMAX 0.700.750.80 00.020.05 0.150.200.25 0.090.140.19 0.150.200.25 1.901.30 2.001.40 2.101.50 0.40BSC 1.60BSC 1.902.002.10 0.800.901.00 0.250.300.350.400.450.50 0.050.100.15 0.200.250.30 1.10X1.80 c 3PEAKandthe3PEAKlogoareregisteredtrademarksof3PEAKINCORPORATED.Allothertrademarksarethepropertyoftheirrespectiveowners. 18/18 Rev.A.0
F. TheTPL51206seriesdevicessupportaremote-sensingfunctionandallpowerrequirementsforDDRVTTbustermination.Inaddition,theTPL51206seriesdevicesprovideS3andS5controlpinscanbeusedtocontrolthepowerstateinDDRapplications,settingOUTtohigh-impedanceinS3state(suspendtoRAM)anddischargingOUTandREFOUTinS4orS5state(suspendtodisk). TheTPL51206seriesdevicesareavailableinthethermallyefficient10-pin2×2DFNpackagewiththermalpad,andsupporttheoperatingtemperaturerangefrom–40°Cto+125°
C. VDDQ=1.2VVTT=0.6V TypicalApplicationSchematic 10μF10μ
F 1REFIN2LDOIN IN10 TPL51206 S59GND8 3OUT4PGND S37REFOUT6 5OUTSNS 1μF0.1μ
F VIN=3Vto5.5V S5SignalS3SignalVTTREF=0.6V 1/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ProductFamilyTable PartNumberTPL51206 OutputCurrent2A OrderableNumberTPL51206-DFFR Package2×2DFN-10 TransportMedia,Quantity3,000 MSLMSL3 Markinginformation206 2/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TableofContents Features
...........................................................................................................................................................................
1Applications.....................................................................................................................................................................
1Description.......................................................................................................................................................................
1TypicalApplicationSchematic......................................................................................................................................
1ProductFamilyTable......................................................................................................................................................
2TableofContents............................................................................................................................................................
3RevisionHistory..............................................................................................................................................................
4PinConfigurationandFunctions..................................................................................................................................
5Specifications..................................................................................................................................................................
6 AbsoluteMaximumRatings
..........................................................................................................................................................
6ESDRatings.................................................................................................................................................................................
6mendedOperatingConditions...........................................................................................................................................
6ThermalInformation......................................................................................................................................................................
6ElectricalCharacteristics...............................................................................................................................................................
7TypicalPerformanceCharacteristics.............................................................................................................................................
9DetailedDescription.....................................................................................................................................................
13Overview.....................................................................................................................................................................................
13FunctionalBlockDiagram...........................................................................................................................................................
13FeatureDescription.....................................................................................................................................................................
13ApplicationandImplementation..................................................................................................................................
15ApplicationInformation................................................................................................................................................................
15TypicalApplication......................................................................................................................................................................
15LayoutRequirements..................................................................................................................................................................
16TapeandReelInformation...........................................................................................................................................
17PackageOutlineDimensions.......................................................................................................................................
182×2DFN-10................................................................................................................................................................................
18 3/18 Rev.A.0 RevisionHistory Date2020/08/312020/12/31 RevisionRev.PreRev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator PreliminaryVersionInitialRelease Notes 4/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator PinConfigurationandFunctions TPL51206SeriesDFN-10Package TopView REFIN1LDOIN2 OUT3PGND4OUTSNS5 ExposedPAD 10IN9S58GND7S36REFOUT NAME PINNUMBERTYPE PinFunctions DESCRIPTION GND8 − Groundreferencepin.ConnectGNDpintoPCBgroundplanedirectly. Regulatorpowersupplyinputpin.A1-μForlargerceramiccapacitorfromINtoground(ascloseas IN 10
I possibletoINpin)isrequiredtoreducethejitterfromprevious-stagepowersupply. LDOIN
2 I LDOpowersupplyinputpin. OUT LDOoutputvoltagepin.Totalcapacitanceof10-μForlargerfromOUTtoground(ascloseaspossible
3 O toOUTpin)isrequiredtoensureregulatorstability. OUTSNS
5 LDOoutputvoltagesensepin.ConnectSNStotheremoteDDRterminationbypasscapacitorstogetI urateremotefeedbacksensingofOUTvoltage. PGND
4 − Powergroundpin.ConnectPGNDpintoPCBgroundplanedirectly. REFIN
1 I ReferenceinputforREFOUTpin.An1/2resistordividerisintegratedinternally. REFOUT
6 OReferenceoutputpin.Connecttogroundthrougha0.1-μFto1-μFceramiccapacitor. S3
7 I S3signalinputpin. S5
9 I S5signalinputpin.
(1)ExposedPADmustbeconnectedtoalarge-areagroundplanetomaximumthethermalperformance. 5/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator Specifications AbsoluteMaximumRatings MIN IN,LDOIN,REFIN,S3,S5 –0.3 PGNDtoGND –0.3 OUT,OUTSNS,REFOUT –0.3 TJ JunctionTemperatureRange –40 TSTG StorageTemperatureRange –55 TL LeadTemperature(Soldering10sec)
(1)StressesbeyondtheAbsoluteMaximumRatingsmaypermanentlydamagethedevice.
(2)AllvoltagevaluesarewithrespecttoGND. ESDRatings HBMCDM HumanBodyModelESDChargedDeviceModelESD ConditionANSI/ESDA/JEDECJS-001ANSI/ESDA/JEDECJS-002 mendedOperatingConditions MIN IN Regulatorinputvoltage
3 LDOIN LDOinputvoltage –0.1 REFIN LDOinputsensevoltage –0.1 S3,S5 S3,S5signalinputvoltage –0.1 OUT LDOoutputvoltage –0.1 OUTSNS LDOoutputsensevoltage –0.1 REFOUT Referenceoutputvoltage –0.1 PGND PowergroundvoltagetoGND –0.1 TJ JunctionTemperatureRange –40 ThermalInformation PACKAGE2×2DFN-10 θJA67.8 θJC,Bottom13.2 MAX60.33.6 150150260 UNITVVV°C°C°
C MinimumLevel Unit ±2000
V ±1500
V MAX5.53.53.55.53.53.53.50.1125 UNITVVVVVVVV°
C UNIT°C/W 6/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ElectricalCharacteristics TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SupplyInputVoltageandCurrent VIN Inputsupplyvoltagerange
3 5.5
V VLDOIN LDOinputvoltagerange 3.5
V VIN_UVLO UndervoltagelockoutofINHysteresis TA=25°
C,VINrising 2.9
3 V 180 mV IIN_S0IIN_S3IIN_SDILDOIN_S0ILDOIN_S3ILDOIN_SD InputsupplycurrentofIN,S0InputsupplycurrentofIN,S3ShutdowncurrentofIN,S4orS5InputcurrentofLDOIN,S0InputcurrentofLDOIN,S3ShutdowncurrentofLDOIN,S4orS5 TA=25°
C,VS3=VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=0V,VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=0V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=0V,VS5=5V,VLDOIN=VREFIN=1.8V,IOUT=0mATA=25°
C,VS3=VS5=0V,VLDOIN=VREFIN=1.8V,IOUT=0mA 0.89 mA 0.34 mA 0.1
5 µ
A 2 10 µ
A 2 10 µ
A 0.2
5 µ
A ReferenceInputandOutput IREFIN InputcurrentofREFIN VREFIN=1.8V 30 µ
A VREFOUT Referenceoutputvoltage VREFINV2 VREFOUT_TOL ToleranceofREFOUTtoREFIN |IREFOUT|≤10mA,1.2V≤VREFIN≤1.8V|IREFOUT|≤100µA,1.2V≤VREFIN≤1.8V 49%49% 51%51% IREFOUT_SRCSourcecurrentlimitofREFOUTVREFIN=1.8V,VREFOUT=0V 10 mA IREFOUT_SNKSinkcurrentlimitofREFOUT VREFIN=0V,VREFOUT=1.8V 10 mA IREFOUT_DIS DischargecurrentofREFOUT TA=25°
C,VS3=VS5=0V,VREFOUT=0.5V
8 mA RegulatedOutputVoltageandCurrent |IOUT|≤10mA,1.2V≤VREFIN≤1.8V −20 VOUT Outputvoltage,VOUT=VREFIN |IOUT|≤1A,1.2V≤VREFIN≤1.8V −30
2 |IOUT|≤2A,1.2V≤VREFIN≤1.8V −40 20 mV 30 mV 40 mV IOUT_SRC SourcecurrentlimitofOUT VREFIN=1.8V,VOUT=VOUTSNS=0.7V
2 A IOUT_SNK SinkcurrentlimitofOUT VREFIN=1.8V,VOUT=VOUTSNS=1.1V
2 A IOUT_LKG LeakagecurrentofOUT TA=25°
C,VS3=0V,VS5=5V,VOUT=VREFOUT
1 10 µ
A IOUT_DIS DischargecurrentofOUT TA=25°
C,VS3=VS5=VREFIN=0V,VOUT=0.5V 50 mA IOUTSNS_BIASInputbiascurrentofOUTSNS VS3=VS5=5V,VOUTSNS=VREFOUT −0.1 0.1 µ
A IOUTSNS_LKGLeakagecurrentofOUTSNS VS3=0V,VS5=5V,VOUTSNS=VREFOUT −0.1 0.1 µ
A 7/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ElectricalCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. S3andS5 VIH High-levelinputofS3andS5 1.7
V VIL Low-levelinputofS3andS5 0.5
V VHL_SYS HysteresisofS3andS5 0.3
V IHL_LKG LeakagecurrentofS3andS5 –
1 1 µ
A TemperatureRange Thermalshutdownthreshold Temperatureincreasing TSDHysteresis 160 °
C 20 °
C 8/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V,VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. VINSupplyCurrent(mA) 5 4 3 2 1 0-40-25-105203550658095110125JunctionTemperature(°C) VINSupplyCurrent(µA) 800700600500400300200100 0-40-25-105203550658095110125JunctionTemperature(°C) VLDOIN=1.8V S3=S5=5V S0 Figure1VINSupplyCurrentvs.JunctionTemperature
5 VINShutdownCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=0V,S5=5V S3 Figure2VINSupplyCurrentvs.JunctionTemperature
5 VLDOINSupplyCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=S5=0V S4orS5 Figure3VINShutdownCurrentvs.JunctionTemperature
5 VLDOINSupplyCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=S5=5V S0 Figure4VLDOINSupplyCurrentvs.JunctionTemperature
5 VLDOINShutdownCurrent(µA)
4 3
2 1 0-40-25-105203550658095110125 JunctionTemperature(°C) VLDOIN=1.8V S3=0V,S5=5V S3 Figure5VLDOINSupplyCurrentvs.JunctionTemperature VLDOIN=1.8V S3=S5=0V S4orS5 Figure6VLDOINShutdownCurrentvs.JunctionTemperature 9/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. 0.9200.910 −40°C25°C85°
C 0.7700.760 −40°C25°C85°
C 0.900 0.750 OutputVoltage(V) OutputVoltage(V) 0.890 0.740 0.880 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.8VFigure7OUTLoadRegulation DDR2 0.6950.685 −40°C25°C85°
C 0.675 0.730 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.5VFigure8OUTLoadRegulation DDR3 0.6200.6100.600 −40°C25°C85°
C OutputVoltage(V) OutputVoltage(V) 0.665 0.590 0.655 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.35VFigure9OUTLoadRegulation DDR3L 0.9200.910 −40°C25°C85°
C 0.900 0.580 -
2 -
1 0
1 2 OutputCurrent(A) VLDOIN=1.2V LPDDR3orDDR4 Figure10OUTLoadRegulation 0.7700.760 −40°C25°C85°
C 0.750 REFOUTOutputVoltage(V) REFOUTOutputVoltage(V) 0.890 0.740 0.880 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.8V DDR2 Figure11REFOUTLoadRegulation 0.730 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.5V DDR3 Figure12REFOUTLoadRegulation 10/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. 0.6950.685 −40°C25°C85°
C 0.6200.610 −40°C25°C85°
C 0.675 0.600 REFOUTOutputVoltage(V)REFOUTOutputVoltage(V) 0.665 0.590 0.655 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.35V DDR3L Figure13REFOUTLoadRegulation 0.580 -10 -
5 0
5 10 REFOUTOutputCurrent(mA) VLDOIN=1.2V LPDDR3orDDR4 Figure14REFOUTLoadRegulation S3REFOUT 2V/div500mV/div VLDOIN=1.8V S3EnableFigure15PowerUp OUT 10μs/div20mV/div IOUT 2A2A 2A/div REFOUTOUTS5 200mV/div 200mV/div2V/div VLDOIN=1.8V S5DisableFigure16PowerDown 50μs/div OUT IOUT 2A2A 20mV/div2A/div VLDOIN=1.8V OUT=0.9VFigure17LoadTransient 500μs/div VLDOIN=1.2V OUT=0.6VFigure18LoadTransient 500μs/div 11/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator TypicalPerformanceCharacteristics(continued) TJ=–40°Cto+125°C(typicalvalueatTJ=25°C),VIN=5V;VLDOIN=VREFIN,VS3=VS5=5V,CIN=10µF,andCOUT=10µF;unlessotherwisenoted. REFOUTOUT 500mV/div500mV/div REFOUTOUT 500mV/div500mV/div OutputVoltage(V)OutputVoltage(V) IOUT 5A/div VLDOIN=1.8V OUT=0.9V 20μs/div Figure19OutputShort-to-GNDProtection
1 0.9 −40°
C 0.8 25°
C 0.7 85°
C 0.6 125°
C 0.5 0.4 0.3 0.2 0.1
0 2.5 2.6 2.7 2.8 2.9
3 Input
Voltage(V) Figure21VINUVLORising IOUT 5A/div VLDOIN=1.2V OUT=0.6V 20μs/div Figure20OutputShort-to-GNDProtection
1 0.9 −40°
C 0.8 25°
C 0.7 85°
C 0.6 125°
C 0.5 0.4 0.3 0.2 0.1
0 2.5 2.6 2.7 2.8 2.9
3 Input
Voltage(V) Figure22VINUVLOFalling 12/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator DetailedDescription Overview TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplicationswithheavyspacelimitation.TheTPL51206seriesdevicesimplementafastload-transientresponseandonlyrequiresaminimumoutputcapacitanceof10μ
F.TheTPL51206seriesdevicessupportaremote-sensingfunctionandallpowerrequirementsforDDRVTTbustermination.Inaddition,theTPL51206seriesdevicesprovideS3andS5controlpinscanbeusedtocontrolthepowerstateinDDRapplications,settingOUTtohigh-impedanceinS3state(suspendtoRAM)anddischargingOUTandREFOUTinS4orS5state(suspendtodisk). FunctionalBlockDiagram LDOININS3S5 REFINGND UVLO AMP S3ControlS5Control RegulationControl OUTDischarge BUF BUF TemperatureControl OUTDischarge AMP REFOUTDischarge OUTOUTSNS PGNDREFOUT Figure23FunctionalBlockDiagram FeatureDescription SinkandSourceRegulator(OUTandOUTSNS) TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplicationswithheavyspacelimitation.TheTPL51206seriesintegrateahigh-performance,low-dropoutlinearregulatorwithfast-feedbackloopthatcansupportfastloadtransientresponsewithsmallceramiccapacitors.Togettightregulationtolerance,theremotesensingpin,OUTSNSpin,mustbeconnectedtoOUTpinthroughaseparatetracefromhighcurrentpath. VoltageReference(LDOIN,REFINandREFOUT) TheTPL51206seriesusesthevoltageattheREFINpinasthereferenceinput,andthereferenceoutputattheREFOUTpinexactlyfollowthe1⁄2×VREFINwithinthetoleranceofVREFOUT_TOL.WhentheTPL51206seriesareconfiguredforstandardDDRapplications,theLDOINpinandtheREFINpinaredirectlyconnectedwithinputvoltagerangefrom1Vto3.5V,andthevoltageattheREFINpinisdividedbyhalfthroughaninternalresistordivider.TheREFOUTpinoftheTPL51206seriesimplementaminimum10mAofsinkorsourcecurrentcapability.Duringnormaloperation,theREFOUTpincannotbeopen,anda0.1-μFto1-μFX5Rorbetterceramiccapacitorisrequiredforstableoperation. INUnder-voltageLockout TheTPL51206seriesuseanunder-voltagelockoutcircuittokeeptheregulatorshutoffuntilINvoltageexceedstherisingUVLO 13/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator thresholdofIN. S3andS5Control TheTPL51206seriesintegratetheS3andS5pinstocontrolthedevicestate.Table1showsthedevicestatewithdifferentS3andS5logicbination,andthecorrespondingstatusofREFOUTandOUT. Table1S3andS5ControlTable STATE S3 S5 REFOUT OUT S0 HIGH HIGH ON ON S3 LOW HIGH ON OFF(High-Z) S4,S5 LOW LOW OFF(Discharge) OFF(Discharge) •InS4orS5state,S3=S5=LOW,alltheoutputsareturn-offanddischargetopowerground.•InS3state,S3=LOWandS5=HIGH,theOUTpinisturn-offinhigh-impedancestate.•InS0state,S3=S5=HIGH,thedeviceinnormaloperationmode. PowerSequenceControl ItismendedtopowerupandpowerdowntheTPL51206serieswiththepowersequenceshowedinFigure24. VIN VLDOIN=VREFIN S5 S3 VREFOUT VOUT Figure24PowerUpandDownSequenceControl OUTOver-CurrentProtection TheTPL51206seriesintegrateaconstantover-currentprotection.Whentheabsolutevalueofoutputsinkorsourcecurrentisgreaterthan2A,thecurrentislimitedtoIOUT_SNKorIOUT_SRC,andtheoutputvoltageisoutofregulation. Over-TemperatureProtection Themendedoperatingjunctiontemperaturerangeis–40°Cto125°
C.Whenthejunctiontemperatureisbetween125°Candthethermalshutdown(TSD)threshold,theregulatorcanstillworkwell,butitwillreducethedevicelifetimeforlong-termusing.Theover-temperatureprotectionworkswhenthejunctiontemperatureexceedsthethermalshutdown(TSD)threshold,whichturnsofftheregulatorimmediately.Untilwhenthedevicecoolsdownandthejunctiontemperaturefallsbelowthethermalshutdownthresholdminusthermalshutdownhysteresis,theregulatorturnsonagain. 14/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator ApplicationandImplementation NOTEInformationinthefollowingapplicationssectionsisnotpartofthe3PEAK’ponentspecificationand3PEAKdoesnotwarrantitsuracypleteness.3PEAK’scustomersareresponsiblefordeterminingsuitabilityponentsfortheirpurposes.Customersshouldvalidateandtesttheirdesignimplementationtoconfirmsystemfunctionality. ApplicationInformation TheTPL51206seriesdevicesare2-AsinkandsourceDDRterminationregulatorsspecificallydesignedfortheDDRapplications.ThefollowingapplicationschematicshowsatypicalusageoftheTPL51206series. TypicalApplication AdjustableOutputOperation Figure25showsthetypicalapplicationschematicoftheTPL51206seriesinDDR4applications. VDDQ=1.2V 10μ
F 1REFIN2LDOIN IN101μ
F VIN=3Vto5.5V VTT=0.6V 10μ
F TPL51206 S59GND8 3OUT4PGND S37REFOUT6 0.1μ
F S5Signal S3SignalVTTREF=0.6V 5OUTSNS Figure25TypicalApplicationSchematic INInputCapacitor 3PEAKmendsplacinga1-μForgreatercapacitorwitha0.1-μFbypasscapacitorinparallelclosetoINpintokeeptheinputvoltagestable.Thevoltageratingofthecapacitorsmustbegreaterthanthemaximuminputvoltage. LDOINInputCapacitor 3PEAKmendsplacinga10-μForgreatercapacitorwitha0.1-μFbypasscapacitorinparallelclosetoLDOINpintokeepthevoltagestableduringtransient.MoreinputcapacitorsarerequirediftherearelargeoutputcapacitorsusedattheOUTpin.ItissuggestedtoplaceinputcapacitorswithahalfoftheoutputcapacitancevalueattheLDOINpin. OutputCapacitor Toensurestableoperation,theTPL51206seriesrequiresoutputcapacitorsof10μForgreater.3PEAKmendsselectingX5RorX7R-typeceramiccapacitorwithminimumequivalentseriesresistance(ESR)andequivalentseriesinductance(ESL).TheoutputcapacitorsmustbeplacedasclosetotheOUTpinaspossible. PowerDissipation Duringnormaloperation,LDOjunctiontemperatureshouldnotexceed125°
C.Usingbelowequationstocalculatethepowerdissipationandestimatethejunctiontemperature. ThepowerdissipationcanbecalculatedusingEquation1. 15/18 Rev.A.0 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator PD=(VIN−VOUT)IOUT+VINIGND
(1) ThejunctiontemperaturecanbeestimatedusingEquation2.θJAisthejunction-to-ambientthermalresistance. TJ=TA+PDJA
(2) LayoutRequirements •Bothinputcapacitorsandoutputcapacitorsmustbeplacedasclosetothedevicepinsaspossible.•Suggestbypasstheinputpintogroundwitha0.1μFbypasscapacitor.Theloopareaformedbythebypasscapacitor connection,voltageinputpinandthegroundpinofthesystemmustbeassmallaspossible.•SuggestusewidetracelengthsorthickcopperweighttominimizeI×Rdropandheatdissipation.•TheGNDpinandthePGNDpinmustbeconnectedtothethermalpadwithmultiplethermalviasasmanyaspossible connectedtotheinternalgroundplanes. 16/18 Rev.A.0 TapeandReelInformation TPL51206Series 2-ASinkandSourceDDRTerminationRegulator OrderNumberTPL51206-DFFR Package2×2DFN-10 D1(mm)180 W1(mm)13.1 A0(mm) 2.3 B0(mm) 2.3 K0(mm) 1.1 P0(mm)
4 W0(mm)
8 Pin1Quadrant Q2 17/18 Rev.A.0 PackageOutlineDimensions 2×2DFN-10 TPL51206Series 2-ASinkandSourceDDRTerminationRegulator
D PIN1#LaserMark
1 2 TOPVIEW SIDEVIEW A1
A E KE2
L b1 b EXPOSEDTHERMALPADZONE D2R h e
2 1 Ne BOTTOMVIEW SYMBOL AA1bb1cDD2eNeEE2 L hRK L/F载体尺寸 MILLIMETER MINNOMMAX 0.700.750.80 00.020.05 0.150.200.25 0.090.140.19 0.150.200.25 1.901.30 2.001.40 2.101.50 0.40BSC 1.60BSC 1.902.002.10 0.800.901.00 0.250.300.350.400.450.50 0.050.100.15 0.200.250.30 1.10X1.80 c 3PEAKandthe3PEAKlogoareregisteredtrademarksof3PEAKINCORPORATED.Allothertrademarksarethepropertyoftheirrespectiveowners. 18/18 Rev.A.0
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