集系统,Product

config 1
Folder OrderNow TechnicalDocuments Tools&Software Support&Community ReferenceDesign ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 ADS869x支持可编程双极输入范围的18位高速单电源SARADC数据采集系统 1特性 •1集成模拟前端的18位ADC•高速: –ADS8691:1MSPS–ADS8695:500kSPS–ADS8699:100kSPS•可通过软件编程的输入范围:–双极范围:±12.288V、±10.24V、±6.144V、± 5.12V和±2.56V–单极范围:0V–12.288V、0V–10.24V、0V– 6.144V以及0V–5.12V•5V模拟电源:1.65V到5VI/O电源•恒定的阻性输入阻抗≥1MΩ•输入过压保护:高达±20V•低漂移的片上4.096V基准电压•出色的性能: –DNL:±0.6LSB;INL:±1.75LSB–SNR:92.5dB;THD:–110dB•ALARM→每通道的高低阈值•multiSPI™接口,支持菊花链连接•扩展工业温度范围:-40°C至+125°C 2应用 •通道隔离的可编程逻辑控制器(PLC)模拟输入模块•测试和测量•电池组监视 3说明 ADS8691、ADS8695和ADS8699器件属于集成数据采集系统系列,均基于逐次逼近(SAR)模数转换器(ADC)。
此类器件采用高速高精度SARADC、集成模拟前端(AFE)输入驱动器电路、高达±20V的过压保护电路以及一个温度漂移极低的4.096V片上基准。
此类器件由5V模拟单电源供电,但支持±12.288V、±6.144V、±10.24V、±5.12V和±2.56V实际双极输入范围以及0V至12.288V、0V至10.24V、0V至6.144V和0V至5.12V单极输入范围。
各输入范围的增益和偏移误差均可在特定数值范围内进行调节,确保直流精度较高。
通过针对器件内部寄存器进行编程可选择输入范围。
该器件提供恒定阻性输入阻抗(≥1MΩ),不受所选输入范围的影响。
multiSPI数字接口向后兼容传统SPI协议。
此外,该器件的可配置特性便于连接各种主机控制器。
器件型号ADS869x 器件信息
(1) 封装TSSOP(16)WQFN(16) 封装尺寸(标称值)5.00mmx4.40mm4.00mmx4.00mm
(1)要了解所有可用封装,请见数据表末尾的可订购产品附录。
AVDD DVDD方框图 ADS869x 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 18-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated
1 AnIMPORTANTNOTICEattheendofthisdatasheetaddressesavailability,warranty,changes,useinsafety-criticalapplications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA. EnglishDataSheet:SBAS777 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 目录 1特性..........................................................................12应用..........................................................................13说明..........................................................................14修订历史记录...........................................................25PinConfigurationandFunctions.........................36Specifications.........................................................4 6.1AbsoluteMaximumRatings......................................46.2ESDRatings..............................................................46.3mendedOperatingConditions.......................46.4ThermalInformation..................................................46.5ElectricalCharacteristics...........................................56.6TimingRequirements:ConversionCycle..................96.7TimingRequirements:AsynchronousReset.............96.8TimingRequirements:SPI-CompatibleSerial Interface.....................................................................96.9TimingRequirements:Source-SynchronousSerial Interface(ExternalClock)........................................106.10TimingRequirements:Source-SynchronousSerial Interface(InternalClock)..........................................106.11TypicalCharacteristics..........................................147DetailedDescription............................................217.1Overview.................................................................217.2FunctionalBlockDiagram.......................................21 7.3FeatureDescription.................................................227.4DeviceFunctionalModes........................................347.5Programming...........................................................397.6RegisterMaps.........................................................478ApplicationandImplementation........................558.1ApplicationInformation............................................558.2TypicalApplication.................................................559PowerSupplymendations......................599.1PowerSupplyDecoupling.......................................599.2PowerSaving..........................................................5910Layout...................................................................6010.1LayoutGuidelines.................................................6010.2LayoutExample....................................................6111器件和文档支持.....................................................6211.1文档支持................................................................6211.2相关链接................................................................6211.3接收文档更新通知.................................................6211.4社区资源................................................................6211.5商标.......................................................................6211.6静电放电警告.........................................................6211.7Glossary................................................................6212机械、封装和可订购信息.......................................63 4修订历史记录 日期2016年12月 修订版本* 注释最初发布。

2 Copyright©2016,TexasInstrumentsIncorporated 5PinConfigurationandFunctions PWPackage16-PinTSSOPTopView(NottoScale) DGND1AVDD2AGND3REFIO4REFGND5REFCAP6AIN_P7AIN_GND8 16DVDD15RVS14ALARM/SDO-1/GPO13SDO-012SCLK11CONVST/CS10SDI9RST AGNDREFIOREFGNDREFCAP AVDDDGNDDVDDRVS ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 RUMPackage16-PinWQFNTopView(NottoScale) ALARM/SDO-1/GPOSDO-0SCLKCONVST/CS AIN_PAIN_GND RSTSDI NAMEAGNDAIN_GNDAIN_PALARM/SDO-1/GPOAVDD CONVST/CS DGNDDVDDREFCAPREFGNDREFIORSTRVS SCLKSDISDO-
0 NO. TSSOP WQFN
3 1
8 6
7 5 14 12
2 16 11
9 1 15 16 14
6 4
5 3
4 2
9 7 15 13 12 10 10
8 13 11 TYPE

(1) PinFunctions DESCRIPTION
P Analoggroundpin.DecouplewiththeAVDDpin. AI Analoginput:negative.DecouplewiththeAIN_Ppin. AI Analoginput:positive.DecouplewiththeAIN_GNDpin. DO Multi-functionoutputpin.Activehighalarm. Dataoutput1formunication.General-purposeoutputpin.
P Analogsupplypin.DecouplewiththeAGNDpin. Dual-functionalitypin. Activehighlogic:conversionstartinputpin;aCONVSTrisingedgebringsthedevicefrom DI acquisitionphasetoconversionphase. Activelowlogic:chip-selectinputpin;thedevicetakescontrolofthedatabuswhenCSislow; theSDO-xpinsgototri-statewhenCSishigh.
P Digitalgroundpin.DecouplewiththeDVDDpin.
P Digitalsupplypin.DecouplewiththeDGNDpin. AO ADCreferencebufferdecouplingcapacitorpin.DecouplewiththeREFGNDpin.
P Referencegroundpin;shorttotheanaloggroundplane.DecouplewiththeREFIOand REFCAPpins. AIOInternalreferenceoutputandexternalreferenceinputpin.DecouplewithREFGND. DI Activelowlogicinputtoresetthedevice. Multi-functionoutputpinforserialinterface;seetheRESETStatesection. DO WithCSheldhigh,RVSreflectsthestatusoftheinternalADCSTsignal. WithCSlow,thestatusofRVSdependsontheoutputprotocolselection. DI munication:clockinputpinfortheserialinterface. Allsystem-synchronousdatatransferprotocolsaretimedwithrespecttotheSCLKsignal. DI Dualfunction:datainputpinformunication. Chaindatainputduringmunicationindaisy-chainmode. DO munication:dataoutput0
(1)AI=analoginput,AIO=analoginput/output,DI=digitalinput,DO=digitaloutput,andP=powersupply. Copyright©2016,TexasInstrumentsIncorporated
3 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 6Specifications 6.1AbsoluteMaximumRatings overoperatingfree-airtemperaturerange(unlessotherwisenoted)
(1) AIN_
P,AIN_GNDtoGND AVDD=5V
(2)AVDD=floating
(3) AVDDtoGNDorDVDDtoGND REFCAPtoREFGNDorREFIOtoREFGND GNDtoREFGND DigitalinputpinstoGND DigitaloutputpinstoGND Temperature Operating,TAStorage,Tstg MIN MAX UNIT –20 20
V –11 11 –0.3
7 V –0.3 5.7
V –0.3 0.3
V –0.3 DVDD
+0.3
V –0.3 DVDD+0.3
V –40 125 °
C –65 150
(1)StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,anddonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundermendedOperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)AVDD=5Voffersalowimpedanceof<30kΩ.
(3)AVDD=floatingwithanimpedance>30kΩ. 6.2ESDRatings V(ESD) Electrostaticdischarge AnaloginputpinsHumanbodymodel(HBM),perANSI/ESDA/JEDECJS-001
(1)(AIN_
P,AIN_GND) Allotherpins Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101
(2)
(1)JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2)JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. VALUE±4000±2000±500 UNITV 6.3mendedOperatingConditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN AVDD Analogsupplyvoltage 4.75 DVDD Digitalsupplyvoltage 1.65 NOM5 3.3 MAX5.25AVDD UNITVV 6.4ThermalInformation THERMALMETRIC
(1) RθJARθ)RθJBψJTψJBRθJC(bot) Junction-to-ambientthermalresistanceJunction-to-case)thermalresistanceJunction-to-boardthermalresistancecharacterizationparameterJunction-to-boardcharacterizationparameterJunction-to-case(bottom)thermalresistance ADS8691,ADS8695,ADS8699 PW(TSSOP)RUM(WQFN) 16PINS 16PINS 95.7 31.9 29.3 27.9 41.5 7.4 1.5 0.3 40.8 7.4 N/A 1.9 UNIT °C/W°C/W°C/W°C/W°C/W°C/W
(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport.
4 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 6.5ElectricalCharacteristics allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT ANALOGINPUTS Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Full-scaleinputspan
(1) VIN (AIN_PtoAIN_GND) Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF –5.12–2.56
0 5.12 2.56
V 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Inputrange=±1.25×VREF –5.12 5.12 AIN_
P Operatinginputrange Inputrange=±0.625×VREF –2.56 2.56
V Inputrange=3×VREF
0 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 AIN_GND Operatinginputrange Allinputranges –0.1
0 0.1
V Inputrange=±3×VREF 1.02 1.2 1.38 Inputrange=±1.5×VREF 1.02 1.2 1.38 Inputrange=3×VREF 1.02 1.2 1.38 Inputrange=1.5×VREF 1.02 1.2 1.38 RIN Inputimpedance AtTA=25°CInputrange=±2.5×VREF 0.85
1 1.15MΩ Inputrange=±1.25×VREF 0.85
1 1.15 Inputrange=±0.625×VREF 0.85
1 1.15 Inputrange=2.5×VREF 0.85
1 1.15 Inputrange=1.25×VREF 0.85
1 1.15 Inputimpedancedrift
7 25ppm/°
C Inputrange=±3×VREF (VIN–2.5)/RIN Inputrange=±2.5×VREF (VIN–2.2)/RIN Inputrange=±1.5×VREF (VIN–2.0)/RIN IIN Inputcurrent WithvoltageattheAIN_Ppin=VIN Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF (VIN–2.0)/RIN (VIN–1.6)/RIN µ
A (VIN–2.6)/RIN Inputrange=2.5×VREF (VIN–2.5)/RIN Inputrange=1.5×VREF (VIN–2.7)/RIN Inputrange=1.25×VREF (VIN–2.5)/RIN INPUTOVERVOLTAGEPROTECTIONCIRCUIT VOVP Allinputranges AVDD=5Vorofferslowimpedance<30kΩ, –20 allinputranges AVDD=floatingwithimpedance>30kΩ, –11 allinputranges 20V 11 INPUTBANDWIDTH f–3dBf–0.1dB Small-signalInputbandwidth –3dB–0.1dB AllinputrangesAllinputranges 15kHz 2.5
(1)Idealinputspan,doesnotincludegainoroffseterror. Copyright©2016,TexasInstrumentsIncorporated
5 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT SYSTEMPERFORMANCE Resolution 18 Bits NMC Nomissingcodes 18 Bits DNL Differentialnonlinearity
(2) Allinputranges –0.9 ±0.6 1.1LSB INL Integralnonlinearity
(2) ADS8691 Inputrange=±3×VREF,±2.5×VREF,±1.5×VREF,±1.25×VREF Inputrange=±0.625×VREFAllunipolarranges
(3) –3.25 –4.25–3.5 ±1.75 ±2.25±
2 3.254.25 LSB3.5 ADS8695,ADS8699 Allinputranges –
3 ±1.5
3 EO Offseterror
(4) AtTA=25°
C Allbipolarranges
(5)Allunipolarranges
(3)
1 ±0.2 –
2 ±0.2 1mV
2 Offseterrordriftwithtemperature Allinputranges –
3 ±0.75 3ppm/°
C EG Gainerror
(6) AtTA=25°C,allinputranges Gainerrordriftwithtemperature
(7) Allinputranges –0.025–
5 ±0.01±
1 0.0255 %FSRppm/°
C DYNAMICCHARACTERISTICS Inputrange=±3×VREF 91 92.5 Inputrange=±2.5×VREF 91 92.5 Inputrange=±1.5×VREF 90 91.5 SNR Signal-to-noiseratio
(8) Inputrange=±1.25×VREFInputrange=±0.625×VREF 90 91.5 87.75 90 dB Inputrange=3×VREF 89.5 91 Inputrange=2.5×VREF 89.5 91 Inputrange=1.5×VREF 88 91 THD Totalharmonicdistortion
(9)(8) Inputrange=1.25×VREFAllinputranges 88 90 –110 dB Inputrange=±3×VREF 90.9 92.5 Inputrange=±2.5×VREF 90.9 92.5 Inputrange=±1.5×VREF 89.9 91.5 SINAD Signal-to-noise+distortion
(8) Inputrange=±1.25×VREFInputrange=±0.625×VREF 89.9 91.5 87.65 90 dB Inputrange=3×VREF 89.25 91 Inputrange=2.5×VREF 89.25 91 Inputrange=1.5×VREF 87.75 90 SFDR Spurious-freedynamicrange
(8) Inputrange=1.25×VREFAllinputranges 87.75 90 114 dB
(2)ThisspecificationindicatestheendpointINL,notbest-fitINL.
(3)Unipolarrangesare0V–12.288V,0V–10.24V,0V–6.144V,and0V–5.12V.
(4)Measuredrelativetoactualmeasuredreference.
(5)Bipolarrangesare±12.288V,±10.24V,±6.144V,±5.12V,and±2.56V.
(6)Excludesinternalreferenceuracyerror.
(7)Excludesinternalreferencetemperaturedrift.
(8)Allspecificationsexpressedindecibels(dB)refertothefull-scaleinput(FSR)andaretestedwitha1-kHzinputsignal0.25dBbelow full-scale,unlessotherwisespecified.
(9)Calculatedonthefirstnineharmonicsoftheinputfrequency.
6 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT SAMPLINGDYNAMICS ADS8691 665 tCONV Conversiontime ADS8695 1000ns ADS8699 5000 ADS8691 335 tACQ Acquisitiontime ADS8695 1000 ns ADS8699 5000 fcycleMwiathxoimutulmatethnrcoyughputrate ADS8691ADS8695ADS8699 1000500100 kSPS INTERNALREFERENCEOUTPUT VREFIO OntheREFIOpin(configuredasanoutput) AtTA=25°
C TSSOP(PW)WQFN(RUM) 4.095 4.096 4.097
V 4.094 4.096 4.098 dVREFIO/dTA Internalreferencetemperaturedrift TSSOP(PW)WQFN(RUM)
4 7 ppm/°
C 5 COUT_REFIO DecouplingcapacitoronREFIOpin 4.7 µ
F VREFCAP ReferencevoltagetotheADC(ontheREFCAPpin) AtTA=25°
C 4.095 4.096 4.097
V REFCAPtemperaturedrift 0.5 2ppm/°
C COUT_REFCAP DecouplingcapacitoronREFCAPpin 10 μ
F Turn-ontime COUT_REFCAP=10µ
F,COUT_REFIO=10µ
F 20 ms EXTERNALREFERENCEINPUT VREFIO_EXT ExternalreferencevoltageonREFIOREFIOpinconfiguredasaninput 4.046 4.096 4.146
V AVDDCOMPARATOR VTH_HIGH Highthresholdvoltage 5.3
V VTH_LOW Lowthresholdvoltage 4.7
V POWER-SUPPLYREQUIREMENTS AVDD Analogpower-supplyvoltage 4.75
5 5.25 DVDD Digitalpower-supplyvoltage OperatingrangeSupplyrangeforspecifiedperformance 1.65 3.3AVDD
V 2.7 3.3AVDD IAVDD_DYN Analogsupplycurrent,deviceconvertingatmaximumthroughput Internalreference Externalreference ADS8691ADS8695ADS8699ADS8691ADS8695ADS8699 8.2 10.5 5.6 7.25
4 5 mA 7.0 8.75 4.4 5.5 2.7 3.25 IAVDD_STC Analogsupplycurrent,devicenotconverting Internalreference Externalreference ADS8691ADS8695,ADS8699ADS8691ADS8695,ADS8699 4.7 6.25 3.5 4.7 mA 3.5 4.5 2.3
3 IAVDD_STDBY Analogsupplycurrent,deviceinSTANDBYmode InternalreferenceExternalreference 2.8mA 1.6 IAVDD_PD Analogsupplycurrent,deviceinPDmode InternalreferenceExternalreference 10μA 10 IDVDD_DYN Digitalsupplycurrent,maximumthroughput 0.2 0.25mA IDVDD_STDBY Digitalsupplycurrent,deviceinSTANDBYmode
1 μ
A IDVDD_PD Digitalsupplycurrent,deviceinPDmode
1 μ
A Copyright©2016,TexasInstrumentsIncorporated
7 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT DIGITALINPUTS(CMOS) DVDD>2.35V VIH Digitalhighinputvoltagelogiclevel DVDD≤2.35V 0.7×DVDD 0.8×DVDD DVDD+0.3V DVDD+0.3 DVDD>2.35V VIL Digitallowinputvoltagelogiclevel DVDD≤2.35V –0.3 0.3× DVDD
V –0.3 0.2× DVDD Inputleakagecurrent 100 nA Inputpincapacitance
5 pF DIGITALOUTPUTS(CMOS) VOH DigitalhighoutputvoltagelogiclevelIO=500-μAsource 0.8×DVDD DVDD
V VOL Digitallowoutputvoltagelogiclevel IO=500-μAsink
0 0.2×
V DVDD Floatingstateleakagecurrent Onlyfordigitaloutputpins
1 µ
A Internalpincapacitance
5 pF TEMPERATURERANGE TA Operatingfree-airtemperature –40 125°
C 8 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 6.6TimingRequirements:ConversionCycle allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS ADS8691 1000 fcycle Samplingfrequency ADS8695 500kSPS ADS8699 100 tcycle ADCcycletimeperiod 1/fcycle ADS8691 335 tacq Acquisitiontime ADS8695 1000 ns ADS8699 5000 TIMINGSPECIFICATIONS ADS8691 665 tconv Conversiontime ADS8695 1000ns ADS8699 5000 6.7TimingRequirements:AsynchronousReset allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS twl_RST Pulseduration:RSThigh 100 ns TIMINGSPECIFICATIONS tD_RST_PORDelaytimeforPORreset:RSTrisingtoRVSrising 20 ms tD_RST_APPDelaytimeforapplicationreset:RSTrisingtoCONVST/CSrising
1 µs tNAP_WKUPWake-uptime:NAPmode 20 µs tPWRUP Power-uptime:PDmode 20 ms 6.8TimingRequirements:SPI-CompatibleSerialInterface allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55 tCLK tPL_CK SCLKlowtime 0.45 0.55 tCLK tSU_CSCK Setuptime:CONVST/CSfallingtofirstSCLKcaptureedge 7.5 ns tSU_CKDI Setuptime:SDIdatavalidtoSCLKcaptureedge 7.5 ns tHT_CKDI Holdtime:SCLKcaptureedgeto(previous)datavalidonSDI 7.5 ns tHT_CKCS Delaytime:lastSCLKcaptureedgetoCONVST/CSrising 7.5 ns TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tD_CKDO Delaytime:SCLKlaunchedgeto(next)datavalidonSDO-x 12 ns tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSfalling 14 ns Copyright©2016,TexasInstrumentsIncorporated
9 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 6.9TimingRequirements:Source-SynchronousSerialInterface(ExternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55tCLK tPL_CK SCLKlowtime 0.45 0.55tCLK TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5ns tDZ_CSDODelaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10ns tD_CKRVS_rDelaytime:SCLKrisingedgetoRVSrising 14ns tD_CKRVS_fDelaytime:SCLKfallingedgetoRVSfalling 14ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5ns tD_CSRVSDelaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15ns 6.10TimingRequirements:Source-SynchronousSerialInterface(InternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tDEN_CSRVSDelaytime:CONVST/CSfallingedgetofirstrisingedgeonRVS 50 ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5 ns tINTCLK Timeperiod:internalclock 15 ns tCYC_RVS Timeperiod:RVSsignal 15 ns tWH_RVS RVShightime 0.4 0.6tINTCLK tWL_RVS RVSlowtime 0.4 0.6tINTCLK tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15 ns 10 Copyright©2016,TexasInstrumentsIncorporated CONVST/CSADCST(Internal) tcycletconv ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TheCSfallingedgecanbeissuedaftertconv_maxorwhenRVSgoeshigh. tacq RVS Figure1.ConversionCycleTimingDiagram RSTRVS trsttwl_RST td_rst Figure2.AsynchronousResetTimingDiagram CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO tD_CKDO tD_CSDO
M M-
1 M-
2 L+
1 L tSU_CKDI tHT_CKDI Figure3.StandardSPIInterfaceTimingDiagramforCPHA=
0 Copyright©2016,TexasInstrumentsIncorporated 11 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 tconv_max tcycleDataReadTime CONVST/CS RVS tD_CSRVS SCLK CPOL=0CPOL=
1 tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO 0MtSU_CKDI tD_CKDO M-
1 L+1L tHT_CKDI tDZ_CSDO Figure4.StandardSPIInterfaceTimingDiagramforCPHA=
1 CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-
0 tDEN_CSDO tD_CKDO tD_CSDO
M M-
2 M-
4 L+
3 L+
1 SDO-1SDI M-
1 M-
3 M-
5 L+
2 L tSU_CKDI tHT_CKDI Figure5.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
0 12 Copyright©2016,TexasInstrumentsIncorporated CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 SDO-
0 tDEN_CSDO tcycleDataReadTime ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 tD_CSRVStSU_CSCK tHT_CKCS tD_CKDO tDZ_CSDO
0 M M-
2 L+3L+
1 SDO-
1 0 M-
1 M-
1 L+
2 L tSU_CKDI tHT_CKDI SDI Figure6.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
1 CONVST/CSSCLKSDO-0RVS tconvtD_CSRD DataReadTime tSU_CSCK tDEN_CSDO M tD_CKRVS_f tD_RVSDO M-
1 M-kM-k-1M-k-
2 L+
1 tD_CKRVS_r L tD_CSRVS tDZ_CSDO Figure7.multiSPISource-SynchronousExternalClockSerialInterfaceTimingDiagram CONVST/CS tconv_max DataReadTime SCLK tDEN_CSDO SDO-
0 M M-
1 M-kM-k-1M-k-
2 L+
1 L tDEN_CSRVS tD_RVSDO tWH_RVS tD_CSRVS RVS tCYC_RVS tWL_RVS Figure8.multiSPISource-SynchronousInternalClockSerialInterfaceTimingDiagram tDZ_CSDO Copyright©2016,TexasInstrumentsIncorporated 13 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 6.11TypicalCharacteristics atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 15 ±12.288V ±10.24V
9 ±6.144V ±5.12V ±2.56V 0-12.288V
3 0-10.24V 0-6.144V 0-5.12V -
3 15 -40C 25C
9 125C
3 -
3 AnalogInputCurrent(uA) AnalogInputCurrent(uA) -
9 -
9 InputImpedanceDrift(ppm) -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) 8.192 12.288 D001 Figure9.InputI-VCharacteristicAcrossInputRanges 400 200
0 -200 -400-40 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) 125 D003 Figure11.InputImpedanceDriftvsTemperature 15000 NumberofDevices -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) Range=±12.288V 8.192 12.288 D002 Figure10.InputI-VCharacteristicAcrossTemperature 1600 1400 1200 1000 800 600 400 200 01.021.061.11.141.181.221.261.3InputImpedance(M:) Numberofsamples=3398 1.341.38 D004 Figure12.TypicalDistributionofInputImpedance 15000 12000 12000 NumberofHitsNumberofHits 9000 9000 6000 6000 3000 3000 131067 131069 131071 131073 131075 131077 131079 131081 131083 131085 131059 131061 131063 131065 131067 131069 131071 131073 131075
0 D001 Mean=131076.2,sigma=1.9,input=0VFigure13.DCHistogramforMid-ScaleInputs(±12.288V)
0 D002 Mean=131066.8,sigma=2.04,input=0VFigure14.DCHistogramforMid-ScaleInputs(±10.24V) 14 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 15000 15000 12000 12000 NumberofHitsNumberofHits 9000 9000 6000 6000 3000 3000 131054 131056 131058 131060 131062 131064 131066 131068 131070 131072 131074 131064 131066 131068 131070 131072 131074 131076 131078 131080 131082 131084
0 D003 Mean=131063.9,sigma=2.23,input=0V Figure15.DCHistogramforMid-ScaleInputs(±6.144V) 15000
0 D004 Mean=131073.5,sigma=2.23,input=0V Figure16.DCHistogramforMid-ScaleInputs(±5.12V) 15000 12000 12000 NumberofHitsNumberofHits 9000 9000 6000 6000 3000 3000 13110631010632 106131413106610683101310701731210734 1071316131078108031013108218314 086131 066131 068131 070131 072131 074131 076131 078131 080131 082131 084131 086
0 D005 Mean=131073,sigma=3.24,input=0V 15000 Figure17.DCHistogramforMid-ScaleInputs(±2.56V)
0 D006 Mean=131075.5,sigma=2.41,input=6.144V 15000 Figure18.DCHistogramforMid-ScaleInputs(0V–12.288V) 12000 12000 NumberofHitsNumberofHits 9000 9000 6000 6000 3000 3000 131061 331013165131067131069131071131073131075131077131079131081131083 08513110631910731 107131313107510773101310791831110833 1081315131087108931013109119313 095
0 D007 Mean=131073.9,sigma=2.49,input=5.12V Figure19.DCHistogramforMid-ScaleInputs(0V–10.24V)
0 D008 Mean=131082,sigma=3.17,input=3.072V Figure20.DCHistogramforMid-ScaleInputs(0V–6.144V) Copyright©2016,TexasInstrumentsIncorporated 15 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 15000
1 DifferentialNonlinearity(LSB) 0.7512000 0.5 NumberofHits 90006000 0.250 -0.25 3000 -0.5-0.75 13106131041310661316813107013072 107131413107613078 108131013108213084 1081316 088
0 D009 Mean=131076.8,sigma=3.61,input=2.56V -
1 0 65536 131072 196608 262143 Codes(LSB) D010 Allinputranges Figure21.DCHistogramforMid-ScaleInputs(0V–5.12V)
1 Maximum 0.75 Minimum Figure22.TypicalDNLforAllCodes 43 DifferentialNonlinearity(LSB)IntegralNonlinearity(LSB) 0.5
2 0.25
1 0
0 -0.25 -
1 -0.5 -
2 -0.75 -
3 -1-40 -
7 26 59 92 Free-AirTemperature(qC) Allinputranges 125 D011 -
4 0 65536 131072 196608 262143 Codes(LSB) D012 Figure23.DNLvsTemperature 4
3 Figure24.TypicalINLforAllCodes(AllBipolarRanges)
4 Maximum
3 Minimum IntegralNonlinearity(LSB)IntegralNonlinearity(LSB)
2 2
1 1
0 0 -
1 -
1 -
2 -
2 -
3 -
3 -
4 0 65536 131072 196608 262143 Codes
(LSB) D013 -4-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D014 Figure25.TypicalINLforAllCodes(AllUnipolarRanges) Figure26.INLvsTemperature(AllBipolarRanges) 16 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
4 1 Maximum ±12.288V ±5.12V 0-10.24V
3 Minimum 0.75 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V
2 0.5 OffsetError(mV) IntegralNonlinearity(LSB)
1 0.25
0 0 -
1 -0.25 -
2 -0.5 -
3 -0.75 -4-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D015 -1-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D036 Figure27.INLvsTemperature(AllUnipolarRanges) 12.510 0.0250.015 Figure28.OffsetErrorvsTemperatureAcrossInputRanges ±12.288V±10.24V±6.144V ±5.12V±2.56V0-12.288V 0-10.24V0-6.144V0-5.12V GainError(%FSR) NumberofDevices 7.5 0.005
5 -0.005 2.5 -0.015
0 00.20.40.60.811.21.41.61.82.02.22.42.62.83 OffsetDrift(ppm/ºC) D037 -0.025-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D038 NumberofUnits Figure29.TypicalHistogramforOffsetDrift 25 20 15 10
5 0 00.511.522.533.544.55 GainDrift(ppm/ºC) D039 GainError(%FSR) Figure30.GainErrorvsTemperatureAcrossInputRanges 1.11 0.90.80.70.60.50.40.30.20.1 0-0.1
0 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 2000 4000 6000 SourceResistance(:) 8000 10000 D040 Figure31.TypicalHistogramforGainErrorDrift Figure32.GainErrorvsExternalResistance(REXT) Copyright©2016,TexasInstrumentsIncorporated 17 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
0 0 -40 -40 Amplitude(dB) Amplitude(dB) -80 -80 -120 -120 -160 -160 Amplitude(dB) -2000 100000 200000300000InputFrequency(Hz) 400000 Numberofpoints=64k,fIN=1kHz 500000 D016 Figure33.TypicalFFTPlot(AllRanges)fortheADS8691
0 -40 -80 -120 -160 -2000 10000 20000 30000 InputFrequency(Hz) 40000 Numberofpoints=64k,fIN=1kHz 50000 D018 Figure35.TypicalFFTPlot(AllRanges)fortheADS8699 97 ±12.288V ±5.12V 0-10.24V 96 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 95 94 93 92 91 90 89 88-40 -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz 125 D020 Figure37.SNRvsTemperature Signal-to-Noise+DistortionRatio(dB) Signal-to-NoiseRatio(dB) -2000 50000 100000150000InputFrequency(Hz) 200000 Numberofpoints=64k,fIN=1kHz 250000 D017 Figure34.TypicalFFTPlot(AllRanges)fortheADS8695 96 ±12.288V ±5.12V 0-10.24V 95 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 94 93 92 91 90 89100 1kInputFrequency(Hz) 10k D019 Figure36.SNRvsInputFrequency 96 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 94 92 90 88100 1kInputFrequency(Hz) 10k D021 Figure38.SINADvsInputFrequency Signal-to-NoiseRatio(dB) 18 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) TotalHarmonicDistortionRatio(dB) Signal-to-Noise+DistortionRatio(dB) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 97 ±12.288V ±5.12V 0-10.24V 96 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 95 -80 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V -90 94 93-100 92 91 90 -110 89 88-40 -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz 125 D022 -120100 1kInputFrequency(Hz) 10k D023 Figure39.SINADvsTemperature -80 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V -90 Figure40.THDvsInputFrequency 987 IAVDDDynamic(mA) TotalHarmonicDistortion(dB)
6 -100
5 4 -110 -120-40 -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz 125 D024
3 ADS8691
2 ADS8695 ADS8699
1 -40 -
7 26 59 92 125 Free-AirTemperature(qC) D025 Figure41.THDvsTemperature
9 Figure42.AVDDCurrentvsTemperature
5 84.5 74
6 IAVDDStatic(mA) IAVDDCurrent(mA)
5 3.5
4 3
2 ADS8691 ADS8695
1 0 200 400 600 800 1000 Throughput(ksps) D027 3 2.5 2-40 ADS8691ADS8695ADS8699 -
7 26 59 92 Free-AirTemperature(qC) 125 D026 Figure43.AVDDCurrentvsThroughput Figure44.AVDDCurrentvsTemperature(DuringSampling) Copyright©2016,TexasInstrumentsIncorporated 19 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 2.8 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 2.7
3 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V 2.5 ±6.144V 0-12.288V 0-5.12V
2 IAVDDStandby(mA)IAVDDPD(uA) 2.6 1.5 12.5 0.5 2.4-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D067
0 -40 -
7 26 59 92 125 Free-AirTemperature(0C)D068 Figure45.AVDDCurrentvsTemperature(StandbyMode) Figure46.AVDDCurrentvsTemperature(Power-DownMode) 20 Copyright©2016,TexasInstrumentsIncorporated 7DetailedDescription ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 7.1Overview TheADS869xdevicesbelongtoafamilyofhigh-speed,high-performance,easy-to-useintegrateddataacquisitionsystem.Thissingle-channeldevicesupportstruebipolarinputvoltageswingsupto±12.288V,operatingonasingle5-Vanalogsupply.ThedevicefeaturesanenhancedSPIinterface(multiSPI)thatallowsthesamplingratetobemaximizedevenwithlowerspeedhostcontrollers. Thedeviceconsistsofahigh-precisionessiveapproximationregister(SAR)analog-to-digitalconverter(ADC)andapower-optimizedanalogfront-end(AFE)circuitforsignalconditioningthatincludes:•Ahigh-resistiveinputimpedance(≥1MΩ)thatisindependentofthesamplingrate•Aprogrammablegainamplifier(PGA)withapseudo-differentialinputconfigurationsupportingninesoftware- programmableunipolarandbipolarinputranges•Asecond-order,low-passantialiasingfilter•AnADCdriveramplifierthatensuresquicksettlingoftheSARADCinputforhighuracy•Aninputovervoltageprotectioncircuitupto±20V Thedevicealsofeaturesalowtemperaturedrift,4.096-Vinternalreferencewithafast-settlingbufferandamultiSPIserialinterfacewithdaisy-chain(DAISY)andALARMfeatures. TheintegrationofthemultichannelprecisionAFEcircuitwithhighinputimpedanceandaprecisionADCoperatingfromasingle5-Vsupplyoffersasimplifiedendsolutionwithoutrequiringexternalhigh-voltagebipolarsuppliesplicateddrivercircuits. 7.2FunctionalBlockDiagram AVDDADS869x DVDD 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 18-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated Copyright©2016,TexasInstrumentsIncorporated 21 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 7.3FeatureDescription 7.3.1AnalogInputStructure Thedevicefeaturesapseudo-differentialinputstructure,meaningthatthesingle-endedanaloginputsignalisappliedatthepositiveinputAIN_PandthenegativeinputAIN_GNDistiedtoGND.Figure47showsthesimplifiedcircuitschematicfortheAFEcircuit,includingtheinputovervoltageprotectioncircuit,PGA,low-passfilter(LPF),andhigh-speedADCdriver. AIN_PAIN_GND 1M:OVP OVP1M: PGA 2nd-OrderLPF ADCDriver ADC CONVST/CSSCLKSDISDO VB Figure47.SimplifiedAnalogFront-EndCircuitSchematic Thedevicecansupportmultipleunipolarorbipolar,single-endedinputvoltagerangesbasedontheconfigurationoftheprogramregisters.AsexplainedintheRANGE_SEL_REGregister,theinputvoltagerangeforeachanalogchannelcanbeconfiguredtobipolar±3×VREF,±2.5×VREF,±1.5×VREF,±1.25×VREF,and±0.625×VREForunipolar0to3×VREF,0to2.5×VREF,0to1.5×VREFand0to1.25×VREF.Withtheinternalorexternalreferencevoltagesetto4.096V,theinputrangesofthedevicecanbeconfiguredtobipolarrangesof±12.288V,±10.24V,±6.144V,±5.12V,and±2.56Vorunipolarrangesof0Vto12.288V,0Vto10.24V,0Vto6.144V,and0Vto5.12V. Thedevicesamplesthevoltagedifference(AIN_P–AIN_GND)betweentheanaloginputandtheAIN_GNDpin.Thedeviceallowsa±0.1-VrangeontheAIN_GNDpin.Thisfeatureisusefulinmodularsystemswherethesensororsignal-conditioningblockisfurtherawayfromtheADContheboardandwhenadifferenceinthegroundpotentialofthesensororsignalconditionerfromtheADCgroundispossible.Insuchcases,runningseparatewiresfromtheAIN_GNDpinofthedevicetothesensororsignal-conditioninggroundismended.Inordertoobtainoptimumperformance,theinputcurrentsandimpedancesalongeachinputpatharemendedtobematched.Thetwosingle-endedsignalstoAIN_PandAIN_GNDmustberoutedassymmetricallyaspossiblefromthesignalsourcetotheADCinputpins. Iftheanaloginputpin(AIN_P)tothedeviceisleftfloating,theoutputoftheADCcorrespondstoaninternalbiasingvoltage.TheoutputfromtheADCmustbeconsideredasinvalidifthedeviceisoperatedwithfloatinginputpins.Thisconditiondoesnotcauseanydamagetothedevice,whichesfullyfunctionalwhenavalidinputvoltageisappliedtothepins. 7.3.2AnalogInputImpedance Thedevicepresentsaresistiveinputimpedance≥1MΩoneachoftheanaloginputs.TheinputimpedanceisindependentoftheADCsamplingfrequencyortheinputsignalfrequency.TheprimaryadvantageofsuchhighimpedanceinputsistheeaseofdrivingtheADCinputswithoutrequiringdrivingamplifierswithlowoutputimpedance.Bipolar,high-voltagepowersuppliesarenotrequiredinthesystembecausethisADCdoesnotrequireanyhigh-voltage,front-enddrivers.Inmostapplications,thesignalsourcesorsensoroutputscanbedirectlyconnectedtotheADCinput,thussignificantlysimplifyingthedesignofthesignalchain. Inordertomaintainthedcuracyofthesystem,matchingtheexternalsourceimpedanceontheAIN_PinputpinwithanequivalentresistanceontheAIN_GNDpinismended.Thismatchinghelpscancelanyadditionaloffseterrorcontributedbytheexternalresistance. 22 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 FeatureDescription(continued) 7.3.3InputProtectionCircuit Thedevicefeaturesaninternalovervoltageprotection(OVP)circuitoneachoftheanaloginputs.Usetheinternalprotectioncircuitonlyasasecondaryprotectionscheme.Theexternalprotectiondevicesintheendapplicationarehighlymendedtobeusedtoprotectagainstsurges,electrostaticdischarge(ESD),andelectricalfasttransient(EFT)conditions.AconceptualblockdiagramoftheinternalOVPcircuitisshowninFigure48. AVDDVP+ RFB 0V ESD AVDD VP- RS AIN_
P RS AIN_GND 1MŸD1pD2p AVDDD1n V± V+ + 1MŸ D2n RDCESD VOUT VBGND Figure48.InputOvervoltageProtectionCircuitSchematic AsshowninFigure48,binationofthe1-MΩ(or,1.2MΩforappropriateinputranges)inputresistorsalongwiththePGAgain-settingresistorsRFBandRDClimitthecurrentflowingintotheinputpin.binationofanti-paralleldiodes,D1andD2areaddedtoprotecttheinternalcircuitryandsettheovervoltageprotectionlimits. Table1explainsthevariousoperatingconditionsforthedevicewhenpoweredon.Thistableindicatesthatwhenthedeviceisproperlypoweredup(AVDD=5V)oroffersalowimpedanceof<30kΩ,theinternalovervoltageprotectioncircuitcanwithstandupto±20Vontheanaloginputpins. Table1.InputOvervoltageProtectionLimitsWhenAVDD=5VorOffersaLowImpedanceof<30kΩ
(1) INPUTCONDITION(VOVP=±20V) CONDITION RANGE |VIN|<|VRANGE| Withinoperatingrange |VRANGE|<|VIN|<|VOVP| Beyondoperatingrangebutwithinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges Allinputranges ADCOUTPUT COMMENTS ValidSaturatedSaturated Devicefunctionsasperdatasheetspecifications. ADCoutputissaturated,butdeviceisinternallyprotected(notmendedforextendedtime).Thisusageconditioncancauseirreversibledamagetothedevice.
(1)GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. Copyright©2016,TexasInstrumentsIncorporated 23 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 TheresultsindicatedinTable1arebasedonanassumptionthattheanaloginputpinisdrivenbyaverylowimpedancesource(RSisapproximately0Ω).However,ifthesourcedrivingtheinputhashigherimpedance,thecurrentflowingthroughtheprotectiondiodesreducesfurther,therebyincreasingtheOVPvoltagerange.Notethathighersourceimpedancesresultingainerrorsandcontributetooverallsystemnoiseperformance. Figure49showsthevoltageversuscurrentresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceispoweredon.ordingtothiscurrent-to-voltage(I-V)response,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩ(or1.2MΩforappropriateinputranges)inputimpedance.However,forvoltagesbeyond±20V,theinternalnodevoltagessurpassthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. ThesameovervoltageprotectioncircuitalsoprovidesprotectiontothedevicewhenthedeviceisnotpoweredonandAVDDisfloatingwithanimpedance>30kΩ.ThisconditioncanarisewhentheinputsignalsareappliedbeforetheADCisfullypoweredon.TheovervoltageprotectionlimitsforthisconditionareshowninTable2. Table2.InputOvervoltageProtectionLimitsWhenAVDD=FloatingwithImpedance>30kΩ
(1) CONDITION INPUTCONDITION(VOVP=±11V) RANGE |VIN|<|VOVP| Withinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges ADCOUTPUT COMMENTS InvalidInvalid DeviceisnotfunctionalbutisprotectedinternallybytheOVPcircuit. Thisusageconditioncancauseirreversibledamagetothedevice.
(1)AVDD=floating,GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. Figure50showstheI-Vresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceisnotpoweredon.ordingtothisI-Vresponse,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩinputimpedance.However,forvoltagesbeyond±11V,theinternalnodevoltagesurpassesthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. InputCurrent(uA)InputCurrent(uA) 30 20 10
0 -10 -20 -30 -30-24-18-12-60612182430 Inputvoltage(V) D005 241812 60-6-12-18-24-20-16-12-8-4048 Inputvoltage(V) 121620 D006 Figure49.I-VCurvefortheInputOVPCircuit(AVDD=5V) Figure50.I-VCurvefortheInputOVPCircuit(AVDD=Floating) 24 Copyright©2016,TexasInstrumentsIncorporated ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 7.3.4ProgrammableGainAmplifier(PGA) Thedevicefeaturesaprogrammablegainamplifier(PGA)aspartoftheanalogsignal-conditioningcircuitthatconvertstheoriginalsingle-endedinputsignalintoafully-differentialsignaltodrivetheinternalSARADC.ThePGAalsoadjustsmon-modeleveloftheinputsignalbeforefeedingitintotheSARADCtoensuremaximumusageoftheADCinputdynamicrange.Dependingontherangeoftheinputsignal,thePGAgaincanbeadjustedbysettingtheRANGE_SEL[3:0]bitsintheconfigurationregister(seetheRANGE_SEL_REGregister).Thedefaultorpower-onstatefortheRANGE_SEL[3:0]bitsis0000,correspondingtoaninputsignalrangeof±3×VREF.Table3liststhevariousconfigurationsoftheRANGE_SEL[3:0]bitsforthedifferentanaloginputvoltageranges. ThePGAusesaworkofresistorsformultiplegainconfigurations.Matchingbetweentheseresistorsisuratelytrimmedtokeeptheoverallgainerrorlowacrossallinputranges. Table3.InputRangeSelectionBitsConfiguration ANALOGINPUTRANGE ±3×VREF±2.5×VREF±1.5×VREF±1.25×VREF±0.625×VREF0–3×VREF0–2.5×VREF0–1.5×VREF0–1.25×VREF BIT3000001111 RANGE_SEL[3:0] BIT2 BIT1
0 0
0 0
0 1
0 1
1 0
0 0
0 0
0 1
0 1 BIT0010100101 7.3.5Second-Order,Low-PassFilter(LPF) Inordertomitigatethenoiseofthefront-endamplifierandgainresistorsofthePGA,theAFEcircuitofthedevicefeaturesasecond-order,antialiasingLPFattheoutputofthePGA.ThemagnitudeandphaseresponseoftheanalogantialiasingfilterareshowninFigure51andFigure52,respectively.Formaximumperformance,the–3-dBcutofffrequencyfortheantialiasingfilteristypicallysetto15kHz.TheperformanceofthefilterisconsistentacrossallinputrangessupportedbytheADC. Magnitude(dB)Phase(Degree) 30-3-6-9-12-1510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D058 45
0 -45 -90 -13510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D059 Figure51.Second-OrderLPFMagnitudeResponse Figure52.Second-OrderLPFPhaseResponse Copyright©2016,TexasInstrumentsIncorporated 25 ADS8691,ADS8695,ADS8699 ZHCSFT8–DECEMBER2016 7.3.6ADCDriver Inordertomeettheperformanceofthedeviceatthemaximumsamplingrate,thesample-and-holdcapacitorsattheinputoftheADCmustbeessfullychargedanddischargedduringtheacquisitiontimewindow.ThisdriverequirementattheinputoftheADCnecessitatestheuseofahigh-bandwidth,low-noise,andstableamplifierbuffer.Suchaninputdriverisintegratedinthefront-endsignalpathoftheanaloginputchannelofthedevice. 7.3.7Reference Thedevicecanoperatewitheitheraninternalvoltagereferenceoranexternalvoltagereferenceusingtheinternalbuffer.TheinternalorexternalreferenceselectionisdeterminedbyprogrammingtheINTREF_DISbitoftheRANGE_SEL_REGregister.Theinternalreferencesourceisenabled(INTREF_DIS=0)bydefaultafterresetorwhenthedevicepowersup.TheINT

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