Folder
OrderNow
TechnicalDocuments
Tools&Software
Support&Community
ReferenceDesign
ADS8661,ADS8665
ZHCSFU0–DECEMBER2016
ADS866x支持可编程双极输入范围的12位高速单电源SARADC数据采集系统
1特性
•1集成模拟前端的12位ADC•高速：
–ADS8661：1.25MSPS–ADS8665：500kSPS•可通过软件编程的输入范围：–双极范围：±12.288V、±10.24V、±6.144V、±
5.12V和±2.56V–单极范围：0V–12.288V、0V–10.24V、0V–
6.144V以及0V–5.12V•5V模拟电源：1.65V到5VI/O电源•恒定的阻性输入阻抗≥1MΩ•输入过压保护：高达±20V•低漂移的片上4.096V基准电压•出色的性能：
–DNL：±0.1LSB；INL：±0.15LSB–SNR：74dB；THD：–102dB•ALARM→每通道的高低阈值•multiSPI™接口，支持菊花链连接•扩展工业温度范围：-40°C至+125°C
2应用
•通道隔离的可编程逻辑控制器(PLC)模拟输入模块•测试和测量•电池组监视
3说明
ADS8661和ADS8665器件属于集成数据采集系统系列，均基于逐次逼近(SAR)模数转换器(ADC)。
此类器件采用高速高精度SARADC、集成模拟前端(AFE)输入驱动器电路、高达±20V的过压保护电路以及一个温度漂移极低的4.096V片上基准。
此类器件由5V模拟单电源供电，但支持±12.288V、±6.144V、±10.24V、±5.12V和±2.56V实际双极输入范围以及0V至12.288V、0V至10.24V、0V至6.144V和0V至5.12V单极输入范围。
各输入范围的增益和偏移误差均可在特定数值范围内进行调节，确保直流精度较高。
通过针对器件内部寄存器进行编程可选择输入范围。
该器件提供恒定阻性输入阻抗(≥1MΩ)，不受所选输入范围的影响。
multiSPI数字接口向后兼容传统SPI协议。
此外，该器件的可配置特性便于连接各种主机控制器。
器件型号ADS866x 器件信息
(1) 封装TSSOP(16)WQFN(16) 封装尺寸（标称值）5.00mmx4.40mm4.00mmx4.00mm
(1)要了解所有可用封装，请见数据表末尾的可订购产品附录。
AVDD DVDD方框图 ADS866x 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 12-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated
1 AnIMPORTANTNOTICEattheendofthisdatasheetaddressesavailability,warranty,changes,useinsafety-criticalapplications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA. EnglishDataSheet:SBAS780 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 目录 1特性..........................................................................12应用..........................................................................13说明..........................................................................14修订历史记录...........................................................25PinConfigurationandFunctions.........................36Specifications.........................................................4 6.1AbsoluteMaximumRatings......................................46.2ESDRatings..............................................................46.3mendedOperatingConditions.......................46.4ThermalInformation..................................................46.5ElectricalCharacteristics...........................................56.6TimingRequirements:ConversionCycle..................86.7TimingRequirements:AsynchronousReset.............86.8TimingRequirements:SPI-CompatibleSerial Interface.....................................................................86.9TimingRequirements:Source-SynchronousSerial Interface(ExternalClock)..........................................96.10TimingRequirements:Source-SynchronousSerial Interface(InternalClock)............................................96.11TypicalCharacteristics..........................................137DetailedDescription............................................207.1Overview.................................................................207.2FunctionalBlockDiagram.......................................20 7.3FeatureDescription.................................................217.4DeviceFunctionalModes........................................337.5Programming...........................................................387.6RegisterMaps.........................................................468ApplicationandImplementation........................548.1ApplicationInformation............................................548.2TypicalApplication.................................................549PowerSupplymendations......................579.1PowerSupplyDecoupling.......................................579.2PowerSaving..........................................................5710Layout...................................................................5810.1LayoutGuidelines.................................................5810.2LayoutExample....................................................5911器件和文档支持.....................................................6011.1文档支持................................................................6011.2相关链接................................................................6011.3接收文档更新通知.................................................6011.4社区资源................................................................6011.5商标.......................................................................6011.6静电放电警告.........................................................6011.7Glossary................................................................6012机械、封装和可订购信息.......................................61 4修订历史记录 日期2016年12月 修订版本* 注释最初发布。
2 Copyright©2016,TexasInstrumentsIncorporated 5PinConfigurationandFunctions PWPackage16-PinTSSOPTopView(NottoScale) DGND1AVDD2AGND3REFIO4REFGND5REFCAP6AIN_P7AIN_GND8 16DVDD15RVS14ALARM/SDO-1/GPO13SDO-012SCLK11CONVST/CS10SDI9RST AGNDREFIOREFGNDREFCAP AVDDDGNDDVDDRVS ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 RUMPackage16-PinWQFNTopView(NottoScale) ALARM/SDO-1/GPOSDO-0SCLKCONVST/CS AIN_PAIN_GND RSTSDI NAMEAGNDAIN_GNDAIN_PALARM/SDO-1/GPOAVDD CONVST/CS DGNDDVDDREFCAPREFGNDREFIORSTRVS SCLKSDISDO-
0 NO. TSSOP WQFN
3 1
8 6
7 5 14 12
2 16 11
9 1 15 16 14
6 4
5 3
4 2
9 7 15 13 12 10 10
8 13 11 TYPE
(1) PinFunctions DESCRIPTION
P Analoggroundpin.DecouplewiththeAVDDpin. AI Analoginput:negative.DecouplewiththeAIN_Ppin. AI Analoginput:positive.DecouplewiththeAIN_GNDpin. DO Multi-functionoutputpin.Activehighalarm. Dataoutput1formunication.General-purposeoutputpin.
P Analogsupplypin.DecouplewiththeAGNDpin. Dual-functionalitypin. Activehighlogic:conversionstartinputpin;aCONVSTrisingedgebringsthedevicefrom DI acquisitionphasetoconversionphase. Activelowlogic:chip-selectinputpin;thedevicetakescontrolofthedatabuswhenCSislow; theSDO-xpinsgototri-statewhenCSishigh.
P Digitalgroundpin.DecouplewiththeDVDDpin.
P Digitalsupplypin.DecouplewiththeDGNDpin. AO ADCreferencebufferdecouplingcapacitorpin.DecouplewiththeREFGNDpin.
P Referencegroundpin;shorttotheanaloggroundplane.DecouplewiththeREFIOand REFCAPpins. AIOInternalreferenceoutputandexternalreferenceinputpin.DecouplewithREFGND. DI Activelowlogicinputtoresetthedevice. Multi-functionoutputpinforserialinterface;seetheRESETStatesection. DO WithCSheldhigh,RVSreflectsthestatusoftheinternalADCSTsignal. WithCSlow,thestatusofRVSdependsontheoutputprotocolselection. DI munication:clockinputpinfortheserialinterface. Allsystem-synchronousdatatransferprotocolsaretimedwithrespecttotheSCLKsignal. DI Dualfunction:datainputpinformunication. Chaindatainputduringmunicationindaisy-chainmode. DO munication:dataoutput0
(1)AI=analoginput,AIO=analoginput/output,DI=digitalinput,DO=digitaloutput,andP=powersupply. Copyright©2016,TexasInstrumentsIncorporated
3 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6Specifications 6.1AbsoluteMaximumRatings overoperatingfree-airtemperaturerange(unlessotherwisenoted)
(1) AIN_
P,AIN_GNDtoGND AVDD=5V
(2)AVDD=floating
(3) AVDDtoGNDorDVDDtoGND REFCAPtoREFGNDorREFIOtoREFGND GNDtoREFGND DigitalinputpinstoGND DigitaloutputpinstoGND Temperature Operating,TAStorage,Tstg MIN MAX UNIT –20 20
V –11 11 –0.3
7 V –0.3 5.7
V –0.3 0.3
V –0.3 DVDD
+0.3
V –0.3 DVDD+0.3
V –40 125 °
C –65 150
(1)StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,anddonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundermendedOperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)AVDD=5Voffersalowimpedanceof<30kΩ.
(3)AVDD=floatingwithanimpedance>30kΩ. 6.2ESDRatings V(ESD) Electrostaticdischarge AnaloginputpinsHumanbodymodel(HBM),perANSI/ESDA/JEDECJS-001
(1)(AIN_
P,AIN_GND) Allotherpins Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101
(2)
(1)JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2)JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. VALUE±4000±2000±500 UNITV 6.3mendedOperatingConditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN AVDD Analogsupplyvoltage 4.75 DVDD Digitalsupplyvoltage 1.65 NOM5 3.3 MAX5.25AVDD UNITVV 6.4ThermalInformation THERMALMETRIC
(1) RθJARθ)RθJBψJTψJBRθJC(bot) Junction-to-ambientthermalresistanceJunction-to-case)thermalresistanceJunction-to-boardthermalresistancecharacterizationparameterJunction-to-boardcharacterizationparameterJunction-to-case(bottom)thermalresistance ADS8661,ADS8665 PW(TSSOP)RUM(WQFN) 16PINS 16PINS 95.7 31.9 29.3 27.9 41.5 7.4 1.5 0.3 40.8 7.4 N/A 1.9 UNIT °C/W°C/W°C/W°C/W°C/W°C/W
(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport.
4 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.5ElectricalCharacteristics allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT ANALOGINPUTS Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Full-scaleinputspan
(1) VIN (AIN_PtoAIN_GND) Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF –5.12–2.56
0 5.12 2.56
V 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Inputrange=±1.25×VREF –5.12 5.12 AIN_
P Operatinginputrange Inputrange=±0.625×VREF –2.56 2.56
V Inputrange=3×VREF
0 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 AIN_GND Operatinginputrange Allinputranges –0.1
0 0.1
V Inputrange=±3×VREF 1.02 1.2 1.38 Inputrange=±1.5×VREF 1.02 1.2 1.38 Inputrange=3×VREF 1.02 1.2 1.38 Inputrange=1.5×VREF 1.02 1.2 1.38 RIN Inputimpedance AtTA=25°CInputrange=±2.5×VREF 0.85
1 1.15MΩ Inputrange=±1.25×VREF 0.85
1 1.15 Inputrange=±0.625×VREF 0.85
1 1.15 Inputrange=2.5×VREF 0.85
1 1.15 Inputrange=1.25×VREF 0.85
1 1.15 Inputimpedancedrift
7 25ppm/°
C Inputrange=±3×VREF (VIN–2.5)/RIN Inputrange=±2.5×VREF (VIN–2.2)/RIN Inputrange=±1.5×VREF (VIN–2.0)/RIN IIN Inputcurrent WithvoltageattheAIN_Ppin=VIN Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF (VIN–2.0)/RIN (VIN–1.6)/RIN µ
A (VIN–2.6)/RIN Inputrange=2.5×VREF (VIN–2.5)/RIN Inputrange=1.5×VREF (VIN–2.7)/RIN Inputrange=1.25×VREF (VIN–2.5)/RIN INPUTOVERVOLTAGEPROTECTIONCIRCUIT VOVP Allinputranges AVDD=5Vorofferslowimpedance<30kΩ, –20 allinputranges AVDD=floatingwithimpedance>30kΩ, –11 allinputranges 20V 11 INPUTBANDWIDTH f–3dBf–0.1dB Small-signalInputbandwidth –3dB–0.1dB AllinputrangesAllinputranges 15kHz 2.5
(1)Idealinputspan,doesnotincludegainoroffseterror. Copyright©2016,TexasInstrumentsIncorporated
5 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT SYSTEMPERFORMANCE Resolution 12 Bits NMC Nomissingcodes 12 Bits DNL Differentialnonlinearity
(2) Allinputranges –0.35 ±0.1 0.35LSB INL Integralnonlinearity
(2) Allinputranges –0.35 ±0.15 0.35LSB EO Offseterror
(3) AtTA=25°
C Allbipolarranges
(4)Allunipolarranges
(5) –
1 ±0.2 –
2 ±0.2 1mV
2 Offseterrordriftwithtemperature Allinputranges –
3 ±0.75 3ppm/°
C EG Gainerror
(6) AtTA=25°C,allinputranges Gainerrordriftwithtemperature
(7) Allinputranges –0.025–
5 ±0.01±
1 0.0255 %FSRppm/°
C DYNAMICCHARACTERISTICS SNR Signal-to-noiseratio
(8) Allinputranges 73 73.5 dB THD Totalharmonicdistortion
(9)(8) Allinputranges –102 dB SINAD Signal-to-noise+distortion
(8) Allinputranges 72.9 73.4 dB SFDR Spurious-freedynamicrange
(8) Allinputranges 103 dB SAMPLINGDYNAMICS tCONV Conversiontime ADS8661ADS8665 550ns 1000 tACQ Acquisitiontime ADS8661ADS8665 250ns 1000 fcycleMwiathxoimutulmatethnrcoyughputrate ADS8661ADS8665 1250500 kSPS INTERNALREFERENCEOUTPUT VREFIO OntheREFIOpin(configuredasanoutput) AtTA=25°
C TSSOP(PW)WQFN(RUM) 4.095 4.096 4.097
V 4.094 4.096 4.098 dVREFIO/dTA Internalreferencetemperaturedrift TSSOP(PW)WQFN(RUM) 4ppm/°C
5 COUT_REFIO DecouplingcapacitoronREFIOpin 4.7 µ
F VREFCAP ReferencevoltagetotheADC(ontheREFCAPpin) AtTA=25°
C 4.095 4.096 4.097
V REFCAPtemperaturedrift 0.5 2ppm/°
C COUT_REFCAP DecouplingcapacitoronREFCAPpin 10 μ
F Turn-ontime COUT_REFCAP=10µ
F,COUT_REFIO=10µ
F 20 ms EXTERNALREFERENCEINPUT VREFIO_EXT ExternalreferencevoltageonREFIOREFIOpinconfiguredasaninput 4.046 4.096 4.146
V AVDDCOMPARATOR VTH_HIGH Highthresholdvoltage 5.3
V VTH_LOW Lowthresholdvoltage 4.7
V
(2)ThisspecificationindicatestheendpointINL,notbest-fitINL.
(3)Measuredrelativetoactualmeasuredreference.
(4)Bipolarrangesare±12.288V,±10.24V,±6.144V,±5.12V,and±2.56V.
(5)Unipolarrangesare0V–12.288V,0V–10.24V,0V–6.144V,and0V–5.12V.
(6)Excludesinternalreferenceuracyerror.
(7)Excludesinternalreferencetemperaturedrift.
(8)Allspecificationsexpressedindecibels(dB)refertothefull-scaleinput(FSR)andaretestedwitha1-kHzinputsignal0.25dBbelow full-scale,unlessotherwisespecified.
(9)Calculatedonthefirstnineharmonicsoftheinputfrequency.
6 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT POWER-SUPPLYREQUIREMENTS AVDD Analogpower-supplyvoltage 4.75
5 5.25 DVDD Digitalpower-supplyvoltage OperatingrangeSupplyrangeforspecifiedperformance 1.65 3.3AVDD
V 2.7 3.3AVDD IAVDD_DYN Analogsupplycurrent,deviceconvertingatmaximumthroughput Internalreference Externalreference ADS8661ADS8665ADS8661ADS8665
7 9 4.9 6.5 mA 5.8 7.25 3.7 4.5 IAVDD_STC Analogsupplycurrent,devicenotconverting InternalreferenceExternalreference 2.9
4 mA 1.7 2.25 IAVDD_STDBY Analogsupplycurrent,deviceinSTANDBYmode InternalreferenceExternalreference 2.8mA 1.6 IAVDD_PD Analogsupplycurrent,deviceinPDmode InternalreferenceExternalreference 10μA 10 IDVDD_DYN Digitalsupplycurrent,maximumthroughput 0.2 0.25mA IDVDD_STDBY Digitalsupplycurrent,deviceinSTANDBYmode
1 μ
A IDVDD_PD Digitalsupplycurrent,deviceinPDmode
1 μ
A DIGITALINPUTS(CMOS) DVDD>2.35V VIH Digitalhighinputvoltagelogiclevel DVDD≤2.35V 0.7×DVDD 0.8×DVDD DVDD+0.3V DVDD+0.3 DVDD>2.35V VIL Digitallowinputvoltagelogiclevel DVDD≤2.35V –0.3 0.3× DVDD
V –0.3 0.2× DVDD Inputleakagecurrent 100 nA Inputpincapacitance
5 pF DIGITALOUTPUTS(CMOS) VOH DigitalhighoutputvoltagelogiclevelIO=500-μAsource 0.8×DVDD DVDD
V VOL Digitallowoutputvoltagelogiclevel IO=500-μAsink
0 0.2×
V DVDD Floatingstateleakagecurrent Onlyfordigitaloutputpins
1 µ
A Internalpincapacitance
5 pF TEMPERATURERANGE TA Operatingfree-airtemperature –40 125°
C Copyright©2016,TexasInstrumentsIncorporated
7 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.6TimingRequirements:ConversionCycle allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fcycle Samplingfrequency ADS8661ADS8665 1250500 kSPS tcycle ADCcycletimeperiod 1/fcycle tacq Acquisitiontime ADS8661 250 ns ADS8665 1000 TIMINGSPECIFICATIONS tconv Conversiontime ADS8661ADS8665 550ns 1000 6.7TimingRequirements:AsynchronousReset allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS twl_RST Pulseduration:RSThigh 100 ns TIMINGSPECIFICATIONS tD_RST_PORDelaytimeforPORreset:RSTrisingtoRVSrising 20 ms tD_RST_APPDelaytimeforapplicationreset:RSTrisingtoCONVST/CSrising
1 µs tNAP_WKUPWake-uptime:NAPmode 20 µs tPWRUP Power-uptime:PDmode 20 ms 6.8TimingRequirements:SPI-CompatibleSerialInterface allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55 tCLK tPL_CK SCLKlowtime 0.45 0.55 tCLK tSU_CSCK Setuptime:CONVST/CSfallingtofirstSCLKcaptureedge 7.5 ns tSU_CKDI Setuptime:SDIdatavalidtoSCLKcaptureedge 7.5 ns tHT_CKDI Holdtime:SCLKcaptureedgeto(previous)datavalidonSDI 7.5 ns tHT_CKCS Delaytime:lastSCLKcaptureedgetoCONVST/CSrising 7.5 ns TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tD_CKDO Delaytime:SCLKlaunchedgeto(next)datavalidonSDO-x 12 ns tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSfalling 14 ns
8 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.9TimingRequirements:Source-SynchronousSerialInterface(ExternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55tCLK tPL_CK SCLKlowtime 0.45 0.55tCLK TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5ns tDZ_CSDODelaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10ns tD_CKRVS_rDelaytime:SCLKrisingedgetoRVSrising 14ns tD_CKRVS_fDelaytime:SCLKfallingedgetoRVSfalling 14ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5ns tD_CSRVSDelaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15ns 6.10TimingRequirements:Source-SynchronousSerialInterface(InternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tDEN_CSRVSDelaytime:CONVST/CSfallingedgetofirstrisingedgeonRVS 50 ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5 ns tINTCLK Timeperiod:internalclock 15 ns tCYC_RVS Timeperiod:RVSsignal 15 ns tWH_RVS RVShightime 0.4 0.6tINTCLK tWL_RVS RVSlowtime 0.4 0.6tINTCLK tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15 ns Copyright©2016,TexasInstrumentsIncorporated
9 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 CONVST/CSADCST(Internal) tcycletconv TheCSfallingedgecanbeissuedaftertconv_maxorwhenRVSgoeshigh. tacq RVS Figure1.ConversionCycleTimingDiagram RSTRVS trsttwl_RST td_rst Figure2.AsynchronousResetTimingDiagram CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO tD_CKDO tD_CSDO
M M-
1 M-
2 L+
1 L tSU_CKDI tHT_CKDI Figure3.StandardSPIInterfaceTimingDiagramforCPHA=
0 10 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 tconv_max tcycleDataReadTime CONVST/CS RVS tD_CSRVS SCLK CPOL=0CPOL=
1 tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO 0MtSU_CKDI tD_CKDO M-
1 L+1L tHT_CKDI tDZ_CSDO Figure4.StandardSPIInterfaceTimingDiagramforCPHA=
1 CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-
0 tDEN_CSDO tD_CKDO tD_CSDO
M M-
2 M-
4 L+
3 L+
1 SDO-1SDI M-
1 M-
3 M-
5 L+
2 L tSU_CKDI tHT_CKDI Figure5.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
0 Copyright©2016,TexasInstrumentsIncorporated 11 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 SDO-
0 tDEN_CSDO tcycleDataReadTime tD_CSRVStSU_CSCK tHT_CKCS tD_CKDO tDZ_CSDO
0 M M-
2 L+3L+
1 SDO-
1 0 M-
1 M-
1 L+
2 L tSU_CKDI tHT_CKDI SDI Figure6.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
1 CONVST/CSSCLKSDO-0RVS tconvtD_CSRD DataReadTime tSU_CSCK tDEN_CSDO M tD_CKRVS_f tD_RVSDO M-
1 M-kM-k-1M-k-
2 L+
1 tD_CKRVS_r L tD_CSRVS tDZ_CSDO Figure7.multiSPISource-SynchronousExternalClockSerialInterfaceTimingDiagram CONVST/CS tconv_max DataReadTime SCLK tDEN_CSDO SDO-
0 M M-
1 M-kM-k-1M-k-
2 L+
1 L tDEN_CSRVS tD_RVSDO tWH_RVS tD_CSRVS RVS tCYC_RVS tWL_RVS Figure8.multiSPISource-SynchronousInternalClockSerialInterfaceTimingDiagram tDZ_CSDO 12 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.11TypicalCharacteristics atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 15 ±12.288V ±10.24V
9 ±6.144V ±5.12V ±2.56V 0-12.288V
3 0-10.24V 0-6.144V 0-5.12V -
3 15 -40C 25C
9 125C
3 -
3 AnalogInputCurrent(uA) AnalogInputCurrent(uA) -
9 -
9 InputImpedanceDrift(ppm) -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) 8.192 12.288 D001 Figure9.InputI-VCharacteristicAcrossInputRanges 400 200
0 -200 -400-40 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) 125 D003 Figure11.InputImpedanceDriftvsTemperature 75000 NumberofDevices -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) Range=±12.288V 8.192 12.288 D002 Figure10.InputI-VCharacteristicAcrossTemperature 1600 1400 1200 1000 800 600 400 200 01.021.061.11.141.181.221.261.3InputImpedance(M:) Numberofsamples=3398 1.341.38 D004 Figure12.TypicalDistributionofInputImpedance 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D001 Mean=2046,sigma=0,input=0V Figure13.DCHistogramforMid-ScaleInputs(±12.288V)
0 2045 2046 2047 OutputCodes D002 Mean=2046,sigma=0,input=0V Figure14.DCHistogramforMid-ScaleInputs(±10.24V) Copyright©2016,TexasInstrumentsIncorporated 13 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 75000 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D003 Mean=2046,sigma=0,input=0V Figure15.DCHistogramforMid-ScaleInputs(±6.144V) 75000
0 2045 2046 2047 OutputCodes D004 Mean=2046,sigma=0,input=0V Figure16.DCHistogramforMid-ScaleInputs(±5.12V) 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D005 Mean=2046,sigma=0,input=0V 75000 Figure17.DCHistogramforMid-ScaleInputs(±2.56V)
0 2048 2049 2050 OutputCodes D006 Mean=2049,sigma=0,input=6.144V 75000 Figure18.DCHistogramforMid-ScaleInputs(0V–12.288V) 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2044 2045 2046 OutputCodes D007 Mean=2045,sigma=0,input=5.12V Figure19.DCHistogramforMid-ScaleInputs(0V–10.24V)
0 2044 2045 2046 OutputCodes D008 Mean=2045,sigma=0,input=3.072V Figure20.DCHistogramforMid-ScaleInputs(0V–6.144V) 14 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 75000 0.5 DifferentialNonlinearity(LSB) NumberofHits 60000450003000015000 0.250 -0.25
0 2045 2046 2047 OutputCodes D009 Mean=2046,sigma=0,input=2.56V Figure21.DCHistogramforMid-ScaleInputs(0V–5.12V) 0.5MaximumMinimum 0.25 -0.50 0.5 1024 2048Codes(LSB) Allinputranges 3072 Figure22.TypicalDNLforAllCodes 4095 D010 0.25 IntegralNonlinearity(LSB) DifferentialNonlinearity(LSB)
0 0 -0.25 -0.25 -0.5-40 0.50.25 -
7 26 59 92 Free-AirTemperature(qC) Allinputranges Figure23.DNLvsTemperature 125 D011 -0.50 1024 2048Codes(LSB) 3072 4095 D012 Figure24.TypicalINLforAllCodes(AllBipolarRanges) 0.5MaximumMinimum 0.25 IntegralNonlinearity(LSB) IntegralNonlinearity(LSB)
0 0 -0.25 -0.25 -0.50 1024 2048Codes(LSB) 3072 4095 D013 Figure25.TypicalINLforAllCodes(AllUnipolarRanges) -0.5-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D014 Figure26.INLvsTemperature(AllBipolarRanges) Copyright©2016,TexasInstrumentsIncorporated 15 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 0.5
1 Maximum ±12.288V ±5.12V 0-10.24V Minimum 0.75 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 0.25 0.5 OffsetError(mV) IntegralNonlinearity(LSB) 0.25
0 0 -0.25 -0.25 -0.5 -0.75 -0.5-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D015 -1-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D036 Figure27.INLvsTemperature(AllUnipolarRanges) 12.510 0.0250.015 Figure28.OffsetErrorvsTemperatureAcrossInputRanges ±12.288V±10.24V±6.144V ±5.12V±2.56V0-12.288V 0-10.24V0-6.144V0-5.12V GainError(%FSR) NumberofDevices 7.5 0.005
5 -0.005 2.5 -0.015
0 00.20.40.60.811.21.41.61.82.02.22.42.62.83 OffsetDrift(ppm/ºC) D037 -0.025-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D038 NumberofUnits Figure29.TypicalHistogramforOffsetDrift 25 20 15 10
5 0 00.511.522.533.544.55 GainDrift(ppm/ºC) D039 GainError(%FSR) Figure30.GainErrorvsTemperatureAcrossInputRanges 1.11 0.90.80.70.60.50.40.30.20.1 0-0.1
0 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 2000 4000 6000 SourceResistance(:) 8000 10000 D040 Figure31.TypicalHistogramforGainErrorDrift Figure32.GainErrorvsExternalResistance(REXT) 16 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
0 0 -30 -30 Amplitude(dB) Amplitude(dB) -60 -60 -90 -90 -120 -120 -150 -150 -1800 125000 250000375000InputFrequency(Hz) 500000 Numberofpoints=64k,fIN=1kHz 625000 D016 Figure33.TypicalFFTPlot(AllRanges)fortheADS8661 74 -1800 50000 100000150000InputFrequency(Hz) 200000 Numberofpoints=64k,fIN=1kHz 250000 D017 Figure34.TypicalFFTPlot(AllRanges)fortheADS8665 74 Signal-to-NoiseRatio(dB) Signal-to-NoiseRatio(dB) 73.5 73.5 73 72.5 72100 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V 1kInputFrequency(Hz) 10k D018 Figure35.SNRvsInputFrequency 74 73 72.572-40 74 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure36.SNRvsTemperature 125 D019 Signal-to-Noise+DistortionRatio(dB) Signal-to-Noise+DistortionRatio(dB) 73 72 71 70100 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 1kInputFrequency(Hz) 10k D020 Figure37.SINADvsInputFrequency 73 72 71 70-40 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure38.SINADvsTemperature 125 D021 Copyright©2016,TexasInstrumentsIncorporated 17 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) -80 -80 ±12.288V 0-12.288V ±10.24V 0-10.24V ±6.144V 0-6.144V -90 ±5.12V ±2.56V 0-5.12V ±12.288V±10.24V±6.144V ±5.12V±2.56V0-12.288V 0-10.24V0-6.144V0-5.12V -90 -100 -100 TotalHarmonicDistortion(dB) TotalHarmonicDistortionRatio(dB) -110 -110 IAVDDDynamic(mA) -120100 1kInputFrequency(Hz) 10k D022 Figure39.THDvsInputFrequency
9 8
7 6
5 4
3 2 ADS8661 ADS8665
1 -40 -
7 26 59 92 125 Free-AirTemperature(qC) D024 Figure41.AVDDCurrentvsTemperature
4 3.5 IAVDDCurrent(mA) -120-40 76.5 65.5 54.5 43.5
0 -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure40.THDvsTemperature 125 D023 250 500 750 1000 1250 Throughput(ksps) D026 Figure42.AVDDCurrentvsThroughput 2.8 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 2.7 IAVDDStandby(mA) IAVDDStatic(mA)
3 2.6 2.5 2.5
2 -40 -
7 26 59 92 125 Free-AirTemperature(qC) D025 Figure43.AVDDCurrentvsTemperature(DuringSampling) 2.4-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D067 Figure44.AVDDCurrentvsTemperature(StandbyMode) 18 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
3 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V 2.5 ±6.144V 0-12.288V 0-5.12V
2 IAVDDPD(uA) 1.5
1 0.5
0 -40 -
7 26 59 92 125 Free-AirTemperature(0C)D068 Figure45.AVDDCurrentvsTemperature(Power-DownMode) Copyright©2016,TexasInstrumentsIncorporated 19 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7DetailedDescription 7.1Overview TheADS866xdevicesbelongtoafamilyofhigh-speed,high-performance,easy-to-useintegrateddataacquisitionsystem.Thissingle-channeldevicesupportstruebipolarinputvoltageswingsupto±12.288V,operatingonasingle5-Vanalogsupply.ThedevicefeaturesanenhancedSPIinterface(multiSPI)thatallowsthesamplingratetobemaximizedevenwithlowerspeedhostcontrollers. Thedeviceconsistsofahigh-precisionessiveapproximationregister(SAR)analog-to-digitalconverter(ADC)andapower-optimizedanalogfront-end(AFE)circuitforsignalconditioningthatincludes:•Ahigh-resistiveinputimpedance(≥1MΩ)thatisindependentofthesamplingrate•Aprogrammablegainamplifier(PGA)withapseudo-differentialinputconfigurationsupportingninesoftware- programmableunipolarandbipolarinputranges•Asecond-order,low-passantialiasingfilter•AnADCdriveramplifierthatensuresquicksettlingoftheSARADCinputforhighuracy•Aninputovervoltageprotectioncircuitupto±20V Thedevicealsofeaturesalowtemperaturedrift,4.096-Vinternalreferencewithafast-settlingbufferandamultiSPIserialinterfacewithdaisy-chain(DAISY)andALARMfeatures. TheintegrationofthemultichannelprecisionAFEcircuitwithhighinputimpedanceandaprecisionADCoperatingfromasingle5-Vsupplyoffersasimplifiedendsolutionwithoutrequiringexternalhigh-voltagebipolarsuppliesplicateddrivercircuits. 7.2FunctionalBlockDiagram AVDDADS866x DVDD 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 12-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated 20 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3FeatureDescription 7.3.1AnalogInputStructure Thedevicefeaturesapseudo-differentialinputstructure,meaningthatthesingle-endedanaloginputsignalisappliedatthepositiveinputAIN_PandthenegativeinputAIN_GNDistiedtoGND.Figure46showsthesimplifiedcircuitschematicfortheAFEcircuit,includingtheinputovervoltageprotectioncircuit,PGA,low-passfilter(LPF),andhigh-speedADCdriver. AIN_PAIN_GND 1M:OVP OVP1M: PGA 2nd-OrderLPF ADCDriver ADC CONVST/CSSCLKSDISDO VB Figure46.SimplifiedAnalogFront-EndCircuitSchematic Thedevicecansupportmultipleunipolarorbipolar,single-endedinputvoltagerangesbasedontheconfigurationoftheprogramregisters.AsexplainedintheRANGE_SEL_REGregister,theinputvoltagerangeforeachanalogchannelcanbeconfiguredtobipolar±3×VREF,±2.5×VREF,±1.5×VREF,±1.25×VREF,and±0.625×VREForunipolar0to3×VREF,0to2.5×VREF,0to1.5×VREFand0to1.25×VREF.Withtheinternalorexternalreferencevoltagesetto4.096V,theinputrangesofthedevicecanbeconfiguredtobipolarrangesof±12.288V,±10.24V,±6.144V,±5.12V,and±2.56Vorunipolarrangesof0Vto12.288V,0Vto10.24V,0Vto6.144V,and0Vto5.12V. Thedevicesamplesthevoltagedifference(AIN_P–AIN_GND)betweentheanaloginputandtheAIN_GNDpin.Thedeviceallowsa±0.1-VrangeontheAIN_GNDpin.Thisfeatureisusefulinmodularsystemswherethesensororsignal-conditioningblockisfurtherawayfromtheADContheboardandwhenadifferenceinthegroundpotentialofthesensororsignalconditionerfromtheADCgroundispossible.Insuchcases,runningseparatewiresfromtheAIN_GNDpinofthedevicetothesensororsignal-conditioninggroundismended.Inordertoobtainoptimumperformance,theinputcurrentsandimpedancesalongeachinputpatharemendedtobematched.Thetwosingle-endedsignalstoAIN_PandAIN_GNDmustberoutedassymmetricallyaspossiblefromthesignalsourcetotheADCinputpins. Iftheanaloginputpin(AIN_P)tothedeviceisleftfloating,theoutputoftheADCcorrespondstoaninternalbiasingvoltage.TheoutputfromtheADCmustbeconsideredasinvalidifthedeviceisoperatedwithfloatinginputpins.Thisconditiondoesnotcauseanydamagetothedevice,whichesfullyfunctionalwhenavalidinputvoltageisappliedtothepins. 7.3.2AnalogInputImpedance Thedevicepresentsaresistiveinputimpedance≥1MΩoneachoftheanaloginputs.TheinputimpedanceisindependentoftheADCsamplingfrequencyortheinputsignalfrequency.TheprimaryadvantageofsuchhighimpedanceinputsistheeaseofdrivingtheADCinputswithoutrequiringdrivingamplifierswithlowoutputimpedance.Bipolar,high-voltagepowersuppliesarenotrequiredinthesystembecausethisADCdoesnotrequireanyhigh-voltage,front-enddrivers.Inmostapplications,thesignalsourcesorsensoroutputscanbedirectlyconnectedtotheADCinput,thussignificantlysimplifyingthedesignofthesignalchain. Inordertomaintainthedcuracyofthesystem,matchingtheexternalsourceimpedanceontheAIN_PinputpinwithanequivalentresistanceontheAIN_GNDpinismended.Thismatchinghelpscancelanyadditionaloffseterrorcontributedbytheexternalresistance. Copyright©2016,TexasInstrumentsIncorporated 21 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 FeatureDescription(continued) 7.3.3InputProtectionCircuit Thedevicefeaturesaninternalovervoltageprotection(OVP)circuitoneachoftheanaloginputs.Usetheinternalprotectioncircuitonlyasasecondaryprotectionscheme.Theexternalprotectiondevicesintheendapplicationarehighlymendedtobeusedtoprotectagainstsurges,electrostaticdischarge(ESD),andelectricalfasttransient(EFT)conditions.AconceptualblockdiagramoftheinternalOVPcircuitisshowninFigure47. AVDDVP+ RFB 0V ESD AVDD VP- RS AIN_
P RS AIN_GND 1MŸD1pD2p AVDDD1n V± V+ + 1MŸ D2n RDCESD VOUT VBGND Figure47.InputOvervoltageProtectionCircuitSchematic AsshowninFigure47,binationofthe1-MΩ(or,1.2MΩforappropriateinputranges)inputresistorsalongwiththePGAgain-settingresistorsRFBandRDClimitthecurrentflowingintotheinputpin.binationofanti-paralleldiodes,D1andD2areaddedtoprotecttheinternalcircuitryandsettheovervoltageprotectionlimits. Table1explainsthevariousoperatingconditionsforthedevicewhenpoweredon.Thistableindicatesthatwhenthedeviceisproperlypoweredup(AVDD=5V)oroffersalowimpedanceof<30kΩ,theinternalovervoltageprotectioncircuitcanwithstandupto±20Vontheanaloginputpins. Table1.InputOvervoltageProtectionLimitsWhenAVDD=5VorOffersaLowImpedanceof<30kΩ
(1) INPUTCONDITION(VOVP=±20V) CONDITION RANGE |VIN|<|VRANGE| Withinoperatingrange |VRANGE|<|VIN|<|VOVP| Beyondoperatingrangebutwithinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges Allinputranges ADCOUTPUT COMMENTS ValidSaturatedSaturated Devicefunctionsasperdatasheetspecifications. ADCoutputissaturated,butdeviceisinternallyprotected(notmendedforextendedtime).Thisusageconditioncancauseirreversibledamagetothedevice.
(1)GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. 22 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TheresultsindicatedinTable1arebasedonanassumptionthattheanaloginputpinisdrivenbyaverylowimpedancesource(RSisapproximately0Ω).However,ifthesourcedrivingtheinputhashigherimpedance,thecurrentflowingthroughtheprotectiondiodesreducesfurther,therebyincreasingtheOVPvoltagerange.Notethathighersourceimpedancesresultingainerrorsandcontributetooverallsystemnoiseperformance. Figure48showsthevoltageversuscurrentresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceispoweredon.ordingtothiscurrent-to-voltage(I-V)response,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩ(or1.2MΩforappropriateinputranges)inputimpedance.However,forvoltagesbeyond±20V,theinternalnodevoltagessurpassthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. ThesameovervoltageprotectioncircuitalsoprovidesprotectiontothedevicewhenthedeviceisnotpoweredonandAVDDisfloatingwithanimpedance>30kΩ.ThisconditioncanarisewhentheinputsignalsareappliedbeforetheADCisfullypoweredon.TheovervoltageprotectionlimitsforthisconditionareshowninTable2. Table2.InputOvervoltageProtectionLimitsWhenAVDD=FloatingwithImpedance>30kΩ
(1) CONDITION INPUTCONDITION(VOVP=±11V) RANGE |VIN|<|VOVP| Withinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges ADCOUTPUT COMMENTS InvalidInvalid DeviceisnotfunctionalbutisprotectedinternallybytheOVPcircuit. Thisusageconditioncancauseirreversibledamagetothedevice.
(1)AVDD=floating,GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. Figure49showstheI-Vresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceisnotpoweredon.ordingtothisI-Vresponse,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩinputimpedance.However,forvoltagesbeyond±11V,theinternalnodevoltagesurpassesthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. InputCurrent(uA)InputCurrent(uA) 30 20 10
0 -10 -20 -30 -30-24-18-12-60612182430 Inputvoltage(V) D005 241812 60-6-12-18-24-20-16-12-8-4048 Inputvoltage(V) 121620 D006 Figure48.I-VCurvefortheInputOVPCircuit(AVDD=5V) Figure49.I-VCurvefortheInputOVPCircuit(AVDD=Floating) Copyright©2016,TexasInstrumentsIncorporated 23 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3.4ProgrammableGainAmplifier(PGA) Thedevicefeaturesaprogrammablegainamplifier(PGA)aspartoftheanalogsignal-conditioningcircuitthatconvertstheoriginalsingle-endedinputsignalintoafully-differentialsignaltodrivetheinternalSARADC.ThePGAalsoadjustsmon-modeleveloftheinputsignalbeforefeedingitintotheSARADCtoensuremaximumusageoftheADCinputdynamicrange.Dependingontherangeoftheinputsignal,thePGAgaincanbeadjustedbysettingtheRANGE_SEL[3:0]bitsintheconfigurationregister(seetheRANGE_SEL_REGregister).Thedefaultorpower-onstatefortheRANGE_SEL[3:0]bitsis0000,correspondingtoaninputsignalrangeof±3×VREF.Table3liststhevariousconfigurationsoftheRANGE_SEL[3:0]bitsforthedifferentanaloginputvoltageranges. ThePGAusesaworkofresistorsformultiplegainconfigurations.Matchingbetweentheseresistorsisuratelytrimmedtokeeptheoverallgainerrorlowacrossallinputranges. Table3.InputRangeSelectionBitsConfiguration ANALOGINPUTRANGE ±3×VREF±2.5×VREF±1.5×VREF±1.25×VREF±0.625×VREF0–3×VREF0–2.5×VREF0–1.5×VREF0–1.25×VREF BIT3000001111 RANGE_SEL[3:0] BIT2 BIT1
0 0
0 0
0 1
0 1
1 0
0 0
0 0
0 1
0 1 BIT0010100101 7.3.5Second-Order,Low-PassFilter(LPF) Inordertomitigatethenoiseofthefront-endamplifierandgainresistorsofthePGA,theAFEcircuitofthedevicefeaturesasecond-order,antialiasingLPFattheoutputofthePGA.ThemagnitudeandphaseresponseoftheanalogantialiasingfilterareshowninFigure50andFigure51,respectively.Formaximumperformance,the–3-dBcutofffrequencyfortheantialiasingfilteristypicallysetto15kHz.TheperformanceofthefilterisconsistentacrossallinputrangessupportedbytheADC. Magnitude(dB)Phase(Degree) 30-3-6-9-12-1510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D058 45
0 -45 -90 -13510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D059 Figure50.Second-OrderLPFMagnitudeResponse Figure51.Second-OrderLPFPhaseResponse 24 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3.6ADCDriver Inordertomeettheperformanceofthedeviceatthemaximumsamplingrate,thesample-and-holdcapacitorsattheinputoftheADCmustbeessfullychargedanddischargedduringtheacquisitiontimewindow.ThisdriverequirementattheinputoftheADCnecessitatestheuseofahigh-bandwidth,low-noise,andstableamplifierbuffer.Suchaninputdriverisintegratedinthefront-endsignalpathoftheanaloginputchannelofthedevice. 7.3.7Reference Thedevicecanoperatewitheitheraninternalvoltagereferenceoranexternalvoltagereferenceusingtheinternalbuffer.TheinternalorexternalreferenceselectionisdeterminedbyprogrammingtheINTREF_DISbitoftheRANGE_SEL_REGregister.Theinternalreferencesourceisenabled(INTREF_DIS=0)bydefaultafterresetorwhenthedevicepowersup.TheINTREF_DISbitmustbeprogrammedtologic1todisabletheinternalreferencesourcewheneveranexternalreferencesourceisused. 7.3.7.1InternalReference Thedevicefeaturesaninternalreferencesourcewithanominaloutputvalueof4.096V.Inordertoselecttheinternalreference,theINTREF_DISbitoftheRANGE_SEL_REGregistermustbeprogrammedtologic0.Whentheinternalreferenceisused,theREFIOpinesanoutputwiththeinternalreferencevalue.A4.7-µF(minimum)decouplingcapacitorismendedtobeplacedbetweentheREFIOpinandREFGND,asshowninFigure52.ThecapacitormustbeplacedasclosetotheREFIOpinaspossible.Theoutputimpedanceoftheinternalband-gapcircuitcreatesalow-passfilterwiththiscapacitortoband-limitthenoiseofthereference.TheuseofasmallercapacitorvalueallowshigherreferencenoiseinthesystemthatcanpotentiallydegradeSNRandSINADperformance.TheREFIOpinmustnotbeusedtodriveexternalacordcloadsbecauseoflimitedcurrentoutputcapability.TheREFIOpincanbeusedasasourceiffollowedbyasuitableopampbuffer(suchastheOPA320). AVDD 4.096VREF RANGE_SEL_REG[6]=0(INTREF_DIS)REFIO REFCAP ADC REFGNDAGND 4.7PF 1PF 10PF Figure52.DeviceConnectionsforUsinganInternal4.096-VReference Copyright©2016,TexasInstrumentsIncorporated 25 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 Thedeviceinternalreferenceisfactory-trimmedtoensuretheinitialuracyspecification.ThehistograminFigure53showsthedistributionoftheinternalvoltagereferenceoutputtakenfrommorethan3420productiondevices. NumberofDevices 1000 900 800 700 600 500 400 300 200 100
0 4.0944.09454.0954.09554.0964.09654.0974.09754.098 REFIOVoltage(V) D060 Figure53.InternalReferenceuracyHistogramatRoomTemperature Theinitialuracyspecificationfortheinternalreferencecanbedegradedifthedieisexposedtoanymechanicalorthermalstress.Heatingthedevicewhenbeingsolderedtoaprintedcircuitboard(PCB)andanysubsequentsolderreflowisaprimarycauseforshiftsintheVREFvalue.Themaincauseofthermalhysteresisisachangeindiestressandisthereforeafunctionofthepackage,die-attachmaterial,andpound,aswellasthelayoutofthedeviceitself. Inordertoillustratethiseffect,30devicesweresolderedusinglead-freesolderpastewiththemanufacturersuggestedreflowprofile,asexplainedinapplicationreportAN-2029Handling&Processmendations(SNOA550).Theinternalvoltagereferenceoutputismeas
此类器件采用高速高精度SARADC、集成模拟前端(AFE)输入驱动器电路、高达±20V的过压保护电路以及一个温度漂移极低的4.096V片上基准。
此类器件由5V模拟单电源供电，但支持±12.288V、±6.144V、±10.24V、±5.12V和±2.56V实际双极输入范围以及0V至12.288V、0V至10.24V、0V至6.144V和0V至5.12V单极输入范围。
各输入范围的增益和偏移误差均可在特定数值范围内进行调节，确保直流精度较高。
通过针对器件内部寄存器进行编程可选择输入范围。
该器件提供恒定阻性输入阻抗(≥1MΩ)，不受所选输入范围的影响。
multiSPI数字接口向后兼容传统SPI协议。
此外，该器件的可配置特性便于连接各种主机控制器。
器件型号ADS866x 器件信息
(1) 封装TSSOP(16)WQFN(16) 封装尺寸（标称值）5.00mmx4.40mm4.00mmx4.00mm
(1)要了解所有可用封装，请见数据表末尾的可订购产品附录。
AVDD DVDD方框图 ADS866x 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 12-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated
1 AnIMPORTANTNOTICEattheendofthisdatasheetaddressesavailability,warranty,changes,useinsafety-criticalapplications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA. EnglishDataSheet:SBAS780 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 目录 1特性..........................................................................12应用..........................................................................13说明..........................................................................14修订历史记录...........................................................25PinConfigurationandFunctions.........................36Specifications.........................................................4 6.1AbsoluteMaximumRatings......................................46.2ESDRatings..............................................................46.3mendedOperatingConditions.......................46.4ThermalInformation..................................................46.5ElectricalCharacteristics...........................................56.6TimingRequirements:ConversionCycle..................86.7TimingRequirements:AsynchronousReset.............86.8TimingRequirements:SPI-CompatibleSerial Interface.....................................................................86.9TimingRequirements:Source-SynchronousSerial Interface(ExternalClock)..........................................96.10TimingRequirements:Source-SynchronousSerial Interface(InternalClock)............................................96.11TypicalCharacteristics..........................................137DetailedDescription............................................207.1Overview.................................................................207.2FunctionalBlockDiagram.......................................20 7.3FeatureDescription.................................................217.4DeviceFunctionalModes........................................337.5Programming...........................................................387.6RegisterMaps.........................................................468ApplicationandImplementation........................548.1ApplicationInformation............................................548.2TypicalApplication.................................................549PowerSupplymendations......................579.1PowerSupplyDecoupling.......................................579.2PowerSaving..........................................................5710Layout...................................................................5810.1LayoutGuidelines.................................................5810.2LayoutExample....................................................5911器件和文档支持.....................................................6011.1文档支持................................................................6011.2相关链接................................................................6011.3接收文档更新通知.................................................6011.4社区资源................................................................6011.5商标.......................................................................6011.6静电放电警告.........................................................6011.7Glossary................................................................6012机械、封装和可订购信息.......................................61 4修订历史记录 日期2016年12月 修订版本* 注释最初发布。
2 Copyright©2016,TexasInstrumentsIncorporated 5PinConfigurationandFunctions PWPackage16-PinTSSOPTopView(NottoScale) DGND1AVDD2AGND3REFIO4REFGND5REFCAP6AIN_P7AIN_GND8 16DVDD15RVS14ALARM/SDO-1/GPO13SDO-012SCLK11CONVST/CS10SDI9RST AGNDREFIOREFGNDREFCAP AVDDDGNDDVDDRVS ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 RUMPackage16-PinWQFNTopView(NottoScale) ALARM/SDO-1/GPOSDO-0SCLKCONVST/CS AIN_PAIN_GND RSTSDI NAMEAGNDAIN_GNDAIN_PALARM/SDO-1/GPOAVDD CONVST/CS DGNDDVDDREFCAPREFGNDREFIORSTRVS SCLKSDISDO-
0 NO. TSSOP WQFN
3 1
8 6
7 5 14 12
2 16 11
9 1 15 16 14
6 4
5 3
4 2
9 7 15 13 12 10 10
8 13 11 TYPE
(1) PinFunctions DESCRIPTION
P Analoggroundpin.DecouplewiththeAVDDpin. AI Analoginput:negative.DecouplewiththeAIN_Ppin. AI Analoginput:positive.DecouplewiththeAIN_GNDpin. DO Multi-functionoutputpin.Activehighalarm. Dataoutput1formunication.General-purposeoutputpin.
P Analogsupplypin.DecouplewiththeAGNDpin. Dual-functionalitypin. Activehighlogic:conversionstartinputpin;aCONVSTrisingedgebringsthedevicefrom DI acquisitionphasetoconversionphase. Activelowlogic:chip-selectinputpin;thedevicetakescontrolofthedatabuswhenCSislow; theSDO-xpinsgototri-statewhenCSishigh.
P Digitalgroundpin.DecouplewiththeDVDDpin.
P Digitalsupplypin.DecouplewiththeDGNDpin. AO ADCreferencebufferdecouplingcapacitorpin.DecouplewiththeREFGNDpin.
P Referencegroundpin;shorttotheanaloggroundplane.DecouplewiththeREFIOand REFCAPpins. AIOInternalreferenceoutputandexternalreferenceinputpin.DecouplewithREFGND. DI Activelowlogicinputtoresetthedevice. Multi-functionoutputpinforserialinterface;seetheRESETStatesection. DO WithCSheldhigh,RVSreflectsthestatusoftheinternalADCSTsignal. WithCSlow,thestatusofRVSdependsontheoutputprotocolselection. DI munication:clockinputpinfortheserialinterface. Allsystem-synchronousdatatransferprotocolsaretimedwithrespecttotheSCLKsignal. DI Dualfunction:datainputpinformunication. Chaindatainputduringmunicationindaisy-chainmode. DO munication:dataoutput0
(1)AI=analoginput,AIO=analoginput/output,DI=digitalinput,DO=digitaloutput,andP=powersupply. Copyright©2016,TexasInstrumentsIncorporated
3 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6Specifications 6.1AbsoluteMaximumRatings overoperatingfree-airtemperaturerange(unlessotherwisenoted)
(1) AIN_
P,AIN_GNDtoGND AVDD=5V
(2)AVDD=floating
(3) AVDDtoGNDorDVDDtoGND REFCAPtoREFGNDorREFIOtoREFGND GNDtoREFGND DigitalinputpinstoGND DigitaloutputpinstoGND Temperature Operating,TAStorage,Tstg MIN MAX UNIT –20 20
V –11 11 –0.3
7 V –0.3 5.7
V –0.3 0.3
V –0.3 DVDD
+0.3
V –0.3 DVDD+0.3
V –40 125 °
C –65 150
(1)StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,anddonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundermendedOperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)AVDD=5Voffersalowimpedanceof<30kΩ.
(3)AVDD=floatingwithanimpedance>30kΩ. 6.2ESDRatings V(ESD) Electrostaticdischarge AnaloginputpinsHumanbodymodel(HBM),perANSI/ESDA/JEDECJS-001
(1)(AIN_
P,AIN_GND) Allotherpins Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101
(2)
(1)JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2)JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. VALUE±4000±2000±500 UNITV 6.3mendedOperatingConditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN AVDD Analogsupplyvoltage 4.75 DVDD Digitalsupplyvoltage 1.65 NOM5 3.3 MAX5.25AVDD UNITVV 6.4ThermalInformation THERMALMETRIC
(1) RθJARθ)RθJBψJTψJBRθJC(bot) Junction-to-ambientthermalresistanceJunction-to-case)thermalresistanceJunction-to-boardthermalresistancecharacterizationparameterJunction-to-boardcharacterizationparameterJunction-to-case(bottom)thermalresistance ADS8661,ADS8665 PW(TSSOP)RUM(WQFN) 16PINS 16PINS 95.7 31.9 29.3 27.9 41.5 7.4 1.5 0.3 40.8 7.4 N/A 1.9 UNIT °C/W°C/W°C/W°C/W°C/W°C/W
(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport.
4 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.5ElectricalCharacteristics allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT ANALOGINPUTS Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Full-scaleinputspan
(1) VIN (AIN_PtoAIN_GND) Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF –5.12–2.56
0 5.12 2.56
V 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 Inputrange=±3×VREF –12.288 12.288 Inputrange=±2.5×VREF –10.24 10.24 Inputrange=±1.5×VREF –6.144 6.144 Inputrange=±1.25×VREF –5.12 5.12 AIN_
P Operatinginputrange Inputrange=±0.625×VREF –2.56 2.56
V Inputrange=3×VREF
0 12.288 Inputrange=2.5×VREF
0 10.24 Inputrange=1.5×VREF
0 6.144 Inputrange=1.25×VREF
0 5.12 AIN_GND Operatinginputrange Allinputranges –0.1
0 0.1
V Inputrange=±3×VREF 1.02 1.2 1.38 Inputrange=±1.5×VREF 1.02 1.2 1.38 Inputrange=3×VREF 1.02 1.2 1.38 Inputrange=1.5×VREF 1.02 1.2 1.38 RIN Inputimpedance AtTA=25°CInputrange=±2.5×VREF 0.85
1 1.15MΩ Inputrange=±1.25×VREF 0.85
1 1.15 Inputrange=±0.625×VREF 0.85
1 1.15 Inputrange=2.5×VREF 0.85
1 1.15 Inputrange=1.25×VREF 0.85
1 1.15 Inputimpedancedrift
7 25ppm/°
C Inputrange=±3×VREF (VIN–2.5)/RIN Inputrange=±2.5×VREF (VIN–2.2)/RIN Inputrange=±1.5×VREF (VIN–2.0)/RIN IIN Inputcurrent WithvoltageattheAIN_Ppin=VIN Inputrange=±1.25×VREFInputrange=±0.625×VREFInputrange=3×VREF (VIN–2.0)/RIN (VIN–1.6)/RIN µ
A (VIN–2.6)/RIN Inputrange=2.5×VREF (VIN–2.5)/RIN Inputrange=1.5×VREF (VIN–2.7)/RIN Inputrange=1.25×VREF (VIN–2.5)/RIN INPUTOVERVOLTAGEPROTECTIONCIRCUIT VOVP Allinputranges AVDD=5Vorofferslowimpedance<30kΩ, –20 allinputranges AVDD=floatingwithimpedance>30kΩ, –11 allinputranges 20V 11 INPUTBANDWIDTH f–3dBf–0.1dB Small-signalInputbandwidth –3dB–0.1dB AllinputrangesAllinputranges 15kHz 2.5
(1)Idealinputspan,doesnotincludegainoroffseterror. Copyright©2016,TexasInstrumentsIncorporated
5 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT SYSTEMPERFORMANCE Resolution 12 Bits NMC Nomissingcodes 12 Bits DNL Differentialnonlinearity
(2) Allinputranges –0.35 ±0.1 0.35LSB INL Integralnonlinearity
(2) Allinputranges –0.35 ±0.15 0.35LSB EO Offseterror
(3) AtTA=25°
C Allbipolarranges
(4)Allunipolarranges
(5) –
1 ±0.2 –
2 ±0.2 1mV
2 Offseterrordriftwithtemperature Allinputranges –
3 ±0.75 3ppm/°
C EG Gainerror
(6) AtTA=25°C,allinputranges Gainerrordriftwithtemperature
(7) Allinputranges –0.025–
5 ±0.01±
1 0.0255 %FSRppm/°
C DYNAMICCHARACTERISTICS SNR Signal-to-noiseratio
(8) Allinputranges 73 73.5 dB THD Totalharmonicdistortion
(9)(8) Allinputranges –102 dB SINAD Signal-to-noise+distortion
(8) Allinputranges 72.9 73.4 dB SFDR Spurious-freedynamicrange
(8) Allinputranges 103 dB SAMPLINGDYNAMICS tCONV Conversiontime ADS8661ADS8665 550ns 1000 tACQ Acquisitiontime ADS8661ADS8665 250ns 1000 fcycleMwiathxoimutulmatethnrcoyughputrate ADS8661ADS8665 1250500 kSPS INTERNALREFERENCEOUTPUT VREFIO OntheREFIOpin(configuredasanoutput) AtTA=25°
C TSSOP(PW)WQFN(RUM) 4.095 4.096 4.097
V 4.094 4.096 4.098 dVREFIO/dTA Internalreferencetemperaturedrift TSSOP(PW)WQFN(RUM) 4ppm/°C
5 COUT_REFIO DecouplingcapacitoronREFIOpin 4.7 µ
F VREFCAP ReferencevoltagetotheADC(ontheREFCAPpin) AtTA=25°
C 4.095 4.096 4.097
V REFCAPtemperaturedrift 0.5 2ppm/°
C COUT_REFCAP DecouplingcapacitoronREFCAPpin 10 μ
F Turn-ontime COUT_REFCAP=10µ
F,COUT_REFIO=10µ
F 20 ms EXTERNALREFERENCEINPUT VREFIO_EXT ExternalreferencevoltageonREFIOREFIOpinconfiguredasaninput 4.046 4.096 4.146
V AVDDCOMPARATOR VTH_HIGH Highthresholdvoltage 5.3
V VTH_LOW Lowthresholdvoltage 4.7
V
(2)ThisspecificationindicatestheendpointINL,notbest-fitINL.
(3)Measuredrelativetoactualmeasuredreference.
(4)Bipolarrangesare±12.288V,±10.24V,±6.144V,±5.12V,and±2.56V.
(5)Unipolarrangesare0V–12.288V,0V–10.24V,0V–6.144V,and0V–5.12V.
(6)Excludesinternalreferenceuracyerror.
(7)Excludesinternalreferencetemperaturedrift.
(8)Allspecificationsexpressedindecibels(dB)refertothefull-scaleinput(FSR)andaretestedwitha1-kHzinputsignal0.25dBbelow full-scale,unlessotherwisespecified.
(9)Calculatedonthefirstnineharmonicsoftheinputfrequency.
6 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 ElectricalCharacteristics(continued) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAXUNIT POWER-SUPPLYREQUIREMENTS AVDD Analogpower-supplyvoltage 4.75
5 5.25 DVDD Digitalpower-supplyvoltage OperatingrangeSupplyrangeforspecifiedperformance 1.65 3.3AVDD
V 2.7 3.3AVDD IAVDD_DYN Analogsupplycurrent,deviceconvertingatmaximumthroughput Internalreference Externalreference ADS8661ADS8665ADS8661ADS8665
7 9 4.9 6.5 mA 5.8 7.25 3.7 4.5 IAVDD_STC Analogsupplycurrent,devicenotconverting InternalreferenceExternalreference 2.9
4 mA 1.7 2.25 IAVDD_STDBY Analogsupplycurrent,deviceinSTANDBYmode InternalreferenceExternalreference 2.8mA 1.6 IAVDD_PD Analogsupplycurrent,deviceinPDmode InternalreferenceExternalreference 10μA 10 IDVDD_DYN Digitalsupplycurrent,maximumthroughput 0.2 0.25mA IDVDD_STDBY Digitalsupplycurrent,deviceinSTANDBYmode
1 μ
A IDVDD_PD Digitalsupplycurrent,deviceinPDmode
1 μ
A DIGITALINPUTS(CMOS) DVDD>2.35V VIH Digitalhighinputvoltagelogiclevel DVDD≤2.35V 0.7×DVDD 0.8×DVDD DVDD+0.3V DVDD+0.3 DVDD>2.35V VIL Digitallowinputvoltagelogiclevel DVDD≤2.35V –0.3 0.3× DVDD
V –0.3 0.2× DVDD Inputleakagecurrent 100 nA Inputpincapacitance
5 pF DIGITALOUTPUTS(CMOS) VOH DigitalhighoutputvoltagelogiclevelIO=500-μAsource 0.8×DVDD DVDD
V VOL Digitallowoutputvoltagelogiclevel IO=500-μAsink
0 0.2×
V DVDD Floatingstateleakagecurrent Onlyfordigitaloutputpins
1 µ
A Internalpincapacitance
5 pF TEMPERATURERANGE TA Operatingfree-airtemperature –40 125°
C Copyright©2016,TexasInstrumentsIncorporated
7 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.6TimingRequirements:ConversionCycle allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fcycle Samplingfrequency ADS8661ADS8665 1250500 kSPS tcycle ADCcycletimeperiod 1/fcycle tacq Acquisitiontime ADS8661 250 ns ADS8665 1000 TIMINGSPECIFICATIONS tconv Conversiontime ADS8661ADS8665 550ns 1000 6.7TimingRequirements:AsynchronousReset allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS twl_RST Pulseduration:RSThigh 100 ns TIMINGSPECIFICATIONS tD_RST_PORDelaytimeforPORreset:RSTrisingtoRVSrising 20 ms tD_RST_APPDelaytimeforapplicationreset:RSTrisingtoCONVST/CSrising
1 µs tNAP_WKUPWake-uptime:NAPmode 20 µs tPWRUP Power-uptime:PDmode 20 ms 6.8TimingRequirements:SPI-CompatibleSerialInterface allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55 tCLK tPL_CK SCLKlowtime 0.45 0.55 tCLK tSU_CSCK Setuptime:CONVST/CSfallingtofirstSCLKcaptureedge 7.5 ns tSU_CKDI Setuptime:SDIdatavalidtoSCLKcaptureedge 7.5 ns tHT_CKDI Holdtime:SCLKcaptureedgeto(previous)datavalidonSDI 7.5 ns tHT_CKCS Delaytime:lastSCLKcaptureedgetoCONVST/CSrising 7.5 ns TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tD_CKDO Delaytime:SCLKlaunchedgeto(next)datavalidonSDO-x 12 ns tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSfalling 14 ns
8 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.9TimingRequirements:Source-SynchronousSerialInterface(ExternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGREQUIREMENTS fCLK Serialclockfrequency 66.67MHz tCLK Serialclocktimeperiod 1/fCLK tPH_CK SCLKhightime 0.45 0.55tCLK tPL_CK SCLKlowtime 0.45 0.55tCLK TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5ns tDZ_CSDODelaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10ns tD_CKRVS_rDelaytime:SCLKrisingedgetoRVSrising 14ns tD_CKRVS_fDelaytime:SCLKfallingedgetoRVSfalling 14ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5ns tD_CSRVSDelaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15ns 6.10TimingRequirements:Source-SynchronousSerialInterface(InternalClock) allminimumandmaximumspecificationsareatTA=–40°Cto+125°C;typicalspecificationsareatTA=25°C;AVDD=5V,DVDD=3.3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) MIN TYP MAXUNIT TIMINGSPECIFICATIONS tDEN_CSDODelaytime:CONVST/CSfallingedgetodataenable 9.5 ns tDZ_CSDO Delaytime:CONVST/CSrisingtoSDO-xgoingto3-state 10 ns tDEN_CSRVSDelaytime:CONVST/CSfallingedgetofirstrisingedgeonRVS 50 ns tD_RVSDODelaytime:RVSrisingto(next)datavalidonSDO-x 2.5 ns tINTCLK Timeperiod:internalclock 15 ns tCYC_RVS Timeperiod:RVSsignal 15 ns tWH_RVS RVShightime 0.4 0.6tINTCLK tWL_RVS RVSlowtime 0.4 0.6tINTCLK tD_CSRVS Delaytime:CONVST/CSrisingedgetoRVSdisplayinginternaldevicestate 15 ns Copyright©2016,TexasInstrumentsIncorporated
9 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 CONVST/CSADCST(Internal) tcycletconv TheCSfallingedgecanbeissuedaftertconv_maxorwhenRVSgoeshigh. tacq RVS Figure1.ConversionCycleTimingDiagram RSTRVS trsttwl_RST td_rst Figure2.AsynchronousResetTimingDiagram CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO tD_CKDO tD_CSDO
M M-
1 M-
2 L+
1 L tSU_CKDI tHT_CKDI Figure3.StandardSPIInterfaceTimingDiagramforCPHA=
0 10 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 tconv_max tcycleDataReadTime CONVST/CS RVS tD_CSRVS SCLK CPOL=0CPOL=
1 tD_CSRVStSU_CSCK tHT_CKCS SDO-0SDI tDEN_CSDO 0MtSU_CKDI tD_CKDO M-
1 L+1L tHT_CKDI tDZ_CSDO Figure4.StandardSPIInterfaceTimingDiagramforCPHA=
1 CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 tcycle DataReadTime tD_CSRVStSU_CSCK tHT_CKCS SDO-
0 tDEN_CSDO tD_CKDO tD_CSDO
M M-
2 M-
4 L+
3 L+
1 SDO-1SDI M-
1 M-
3 M-
5 L+
2 L tSU_CKDI tHT_CKDI Figure5.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
0 Copyright©2016,TexasInstrumentsIncorporated 11 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 CONVST/CSRVS tconv_maxtD_CSRVS SCLK CPOL=0CPOL=
1 SDO-
0 tDEN_CSDO tcycleDataReadTime tD_CSRVStSU_CSCK tHT_CKCS tD_CKDO tDZ_CSDO
0 M M-
2 L+3L+
1 SDO-
1 0 M-
1 M-
1 L+
2 L tSU_CKDI tHT_CKDI SDI Figure6.multiSPIInterfaceTimingDiagramforDualSDO-xandCPHA=
1 CONVST/CSSCLKSDO-0RVS tconvtD_CSRD DataReadTime tSU_CSCK tDEN_CSDO M tD_CKRVS_f tD_RVSDO M-
1 M-kM-k-1M-k-
2 L+
1 tD_CKRVS_r L tD_CSRVS tDZ_CSDO Figure7.multiSPISource-SynchronousExternalClockSerialInterfaceTimingDiagram CONVST/CS tconv_max DataReadTime SCLK tDEN_CSDO SDO-
0 M M-
1 M-kM-k-1M-k-
2 L+
1 L tDEN_CSRVS tD_RVSDO tWH_RVS tD_CSRVS RVS tCYC_RVS tWL_RVS Figure8.multiSPISource-SynchronousInternalClockSerialInterfaceTimingDiagram tDZ_CSDO 12 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 6.11TypicalCharacteristics atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 15 ±12.288V ±10.24V
9 ±6.144V ±5.12V ±2.56V 0-12.288V
3 0-10.24V 0-6.144V 0-5.12V -
3 15 -40C 25C
9 125C
3 -
3 AnalogInputCurrent(uA) AnalogInputCurrent(uA) -
9 -
9 InputImpedanceDrift(ppm) -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) 8.192 12.288 D001 Figure9.InputI-VCharacteristicAcrossInputRanges 400 200
0 -200 -400-40 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) 125 D003 Figure11.InputImpedanceDriftvsTemperature 75000 NumberofDevices -15-12.288-8.192 -4.096
0 4.096 InputVoltage(V) Range=±12.288V 8.192 12.288 D002 Figure10.InputI-VCharacteristicAcrossTemperature 1600 1400 1200 1000 800 600 400 200 01.021.061.11.141.181.221.261.3InputImpedance(M:) Numberofsamples=3398 1.341.38 D004 Figure12.TypicalDistributionofInputImpedance 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D001 Mean=2046,sigma=0,input=0V Figure13.DCHistogramforMid-ScaleInputs(±12.288V)
0 2045 2046 2047 OutputCodes D002 Mean=2046,sigma=0,input=0V Figure14.DCHistogramforMid-ScaleInputs(±10.24V) Copyright©2016,TexasInstrumentsIncorporated 13 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 75000 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D003 Mean=2046,sigma=0,input=0V Figure15.DCHistogramforMid-ScaleInputs(±6.144V) 75000
0 2045 2046 2047 OutputCodes D004 Mean=2046,sigma=0,input=0V Figure16.DCHistogramforMid-ScaleInputs(±5.12V) 75000 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2045 2046 2047 OutputCodes D005 Mean=2046,sigma=0,input=0V 75000 Figure17.DCHistogramforMid-ScaleInputs(±2.56V)
0 2048 2049 2050 OutputCodes D006 Mean=2049,sigma=0,input=6.144V 75000 Figure18.DCHistogramforMid-ScaleInputs(0V–12.288V) 60000 60000 NumberofHits NumberofHits 45000 45000 30000 30000 15000 15000
0 2044 2045 2046 OutputCodes D007 Mean=2045,sigma=0,input=5.12V Figure19.DCHistogramforMid-ScaleInputs(0V–10.24V)
0 2044 2045 2046 OutputCodes D008 Mean=2045,sigma=0,input=3.072V Figure20.DCHistogramforMid-ScaleInputs(0V–6.144V) 14 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 75000 0.5 DifferentialNonlinearity(LSB) NumberofHits 60000450003000015000 0.250 -0.25
0 2045 2046 2047 OutputCodes D009 Mean=2046,sigma=0,input=2.56V Figure21.DCHistogramforMid-ScaleInputs(0V–5.12V) 0.5MaximumMinimum 0.25 -0.50 0.5 1024 2048Codes(LSB) Allinputranges 3072 Figure22.TypicalDNLforAllCodes 4095 D010 0.25 IntegralNonlinearity(LSB) DifferentialNonlinearity(LSB)
0 0 -0.25 -0.25 -0.5-40 0.50.25 -
7 26 59 92 Free-AirTemperature(qC) Allinputranges Figure23.DNLvsTemperature 125 D011 -0.50 1024 2048Codes(LSB) 3072 4095 D012 Figure24.TypicalINLforAllCodes(AllBipolarRanges) 0.5MaximumMinimum 0.25 IntegralNonlinearity(LSB) IntegralNonlinearity(LSB)
0 0 -0.25 -0.25 -0.50 1024 2048Codes(LSB) 3072 4095 D013 Figure25.TypicalINLforAllCodes(AllUnipolarRanges) -0.5-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D014 Figure26.INLvsTemperature(AllBipolarRanges) Copyright©2016,TexasInstrumentsIncorporated 15 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) 0.5
1 Maximum ±12.288V ±5.12V 0-10.24V Minimum 0.75 ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 0.25 0.5 OffsetError(mV) IntegralNonlinearity(LSB) 0.25
0 0 -0.25 -0.25 -0.5 -0.75 -0.5-40 -
7 26 59 92 Free-AirTemperature(qC) 125 D015 -1-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D036 Figure27.INLvsTemperature(AllUnipolarRanges) 12.510 0.0250.015 Figure28.OffsetErrorvsTemperatureAcrossInputRanges ±12.288V±10.24V±6.144V ±5.12V±2.56V0-12.288V 0-10.24V0-6.144V0-5.12V GainError(%FSR) NumberofDevices 7.5 0.005
5 -0.005 2.5 -0.015
0 00.20.40.60.811.21.41.61.82.02.22.42.62.83 OffsetDrift(ppm/ºC) D037 -0.025-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D038 NumberofUnits Figure29.TypicalHistogramforOffsetDrift 25 20 15 10
5 0 00.511.522.533.544.55 GainDrift(ppm/ºC) D039 GainError(%FSR) Figure30.GainErrorvsTemperatureAcrossInputRanges 1.11 0.90.80.70.60.50.40.30.20.1 0-0.1
0 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 2000 4000 6000 SourceResistance(:) 8000 10000 D040 Figure31.TypicalHistogramforGainErrorDrift Figure32.GainErrorvsExternalResistance(REXT) 16 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
0 0 -30 -30 Amplitude(dB) Amplitude(dB) -60 -60 -90 -90 -120 -120 -150 -150 -1800 125000 250000375000InputFrequency(Hz) 500000 Numberofpoints=64k,fIN=1kHz 625000 D016 Figure33.TypicalFFTPlot(AllRanges)fortheADS8661 74 -1800 50000 100000150000InputFrequency(Hz) 200000 Numberofpoints=64k,fIN=1kHz 250000 D017 Figure34.TypicalFFTPlot(AllRanges)fortheADS8665 74 Signal-to-NoiseRatio(dB) Signal-to-NoiseRatio(dB) 73.5 73.5 73 72.5 72100 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V 1kInputFrequency(Hz) 10k D018 Figure35.SNRvsInputFrequency 74 73 72.572-40 74 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure36.SNRvsTemperature 125 D019 Signal-to-Noise+DistortionRatio(dB) Signal-to-Noise+DistortionRatio(dB) 73 72 71 70100 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 1kInputFrequency(Hz) 10k D020 Figure37.SINADvsInputFrequency 73 72 71 70-40 ±12.288V±10.24V±6.144V±5.12V±2.56V 0-12.288V0-10.24V0-6.144V0-5.12V -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure38.SINADvsTemperature 125 D021 Copyright©2016,TexasInstrumentsIncorporated 17 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted) -80 -80 ±12.288V 0-12.288V ±10.24V 0-10.24V ±6.144V 0-6.144V -90 ±5.12V ±2.56V 0-5.12V ±12.288V±10.24V±6.144V ±5.12V±2.56V0-12.288V 0-10.24V0-6.144V0-5.12V -90 -100 -100 TotalHarmonicDistortion(dB) TotalHarmonicDistortionRatio(dB) -110 -110 IAVDDDynamic(mA) -120100 1kInputFrequency(Hz) 10k D022 Figure39.THDvsInputFrequency
9 8
7 6
5 4
3 2 ADS8661 ADS8665
1 -40 -
7 26 59 92 125 Free-AirTemperature(qC) D024 Figure41.AVDDCurrentvsTemperature
4 3.5 IAVDDCurrent(mA) -120-40 76.5 65.5 54.5 43.5
0 -
7 26 59 92 Free-AirTemperature(qC) fIN=1kHz Figure40.THDvsTemperature 125 D023 250 500 750 1000 1250 Throughput(ksps) D026 Figure42.AVDDCurrentvsThroughput 2.8 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V ±6.144V 0-12.288V 0-5.12V 2.7 IAVDDStandby(mA) IAVDDStatic(mA)
3 2.6 2.5 2.5
2 -40 -
7 26 59 92 125 Free-AirTemperature(qC) D025 Figure43.AVDDCurrentvsTemperature(DuringSampling) 2.4-40 -
7 26 59 92 Free-AirTemperature(0C) 125 D067 Figure44.AVDDCurrentvsTemperature(StandbyMode) 18 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TypicalCharacteristics(continued) atTA=25°
C,AVDD=5V,DVDD=3V,VREF=4.096V(internal),andmaximumthroughput(unlessotherwisenoted)
3 ±12.288V ±5.12V 0-10.24V ±10.24V ±2.56V 0-6.144V 2.5 ±6.144V 0-12.288V 0-5.12V
2 IAVDDPD(uA) 1.5
1 0.5
0 -40 -
7 26 59 92 125 Free-AirTemperature(0C)D068 Figure45.AVDDCurrentvsTemperature(Power-DownMode) Copyright©2016,TexasInstrumentsIncorporated 19 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7DetailedDescription 7.1Overview TheADS866xdevicesbelongtoafamilyofhigh-speed,high-performance,easy-to-useintegrateddataacquisitionsystem.Thissingle-channeldevicesupportstruebipolarinputvoltageswingsupto±12.288V,operatingonasingle5-Vanalogsupply.ThedevicefeaturesanenhancedSPIinterface(multiSPI)thatallowsthesamplingratetobemaximizedevenwithlowerspeedhostcontrollers. Thedeviceconsistsofahigh-precisionessiveapproximationregister(SAR)analog-to-digitalconverter(ADC)andapower-optimizedanalogfront-end(AFE)circuitforsignalconditioningthatincludes:•Ahigh-resistiveinputimpedance(≥1MΩ)thatisindependentofthesamplingrate•Aprogrammablegainamplifier(PGA)withapseudo-differentialinputconfigurationsupportingninesoftware- programmableunipolarandbipolarinputranges•Asecond-order,low-passantialiasingfilter•AnADCdriveramplifierthatensuresquicksettlingoftheSARADCinputforhighuracy•Aninputovervoltageprotectioncircuitupto±20V Thedevicealsofeaturesalowtemperaturedrift,4.096-Vinternalreferencewithafast-settlingbufferandamultiSPIserialinterfacewithdaisy-chain(DAISY)andALARMfeatures. TheintegrationofthemultichannelprecisionAFEcircuitwithhighinputimpedanceandaprecisionADCoperatingfromasingle5-Vsupplyoffersasimplifiedendsolutionwithoutrequiringexternalhigh-voltagebipolarsuppliesplicateddrivercircuits. 7.2FunctionalBlockDiagram AVDDADS866x DVDD 4.096-VReference REFIOREFCAP AIN_PAIN_GND 1M:1M: OVPOVP PGA AGND 2nd-OrderLPF ADCDriver VBIAS Oscillator 12-BitSARADC DigitalLogicandInterface CONVST/CSSCLKSDISDO DGND REFGNDCopyright©2016,TexasInstrumentsIncorporated 20 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3FeatureDescription 7.3.1AnalogInputStructure Thedevicefeaturesapseudo-differentialinputstructure,meaningthatthesingle-endedanaloginputsignalisappliedatthepositiveinputAIN_PandthenegativeinputAIN_GNDistiedtoGND.Figure46showsthesimplifiedcircuitschematicfortheAFEcircuit,includingtheinputovervoltageprotectioncircuit,PGA,low-passfilter(LPF),andhigh-speedADCdriver. AIN_PAIN_GND 1M:OVP OVP1M: PGA 2nd-OrderLPF ADCDriver ADC CONVST/CSSCLKSDISDO VB Figure46.SimplifiedAnalogFront-EndCircuitSchematic Thedevicecansupportmultipleunipolarorbipolar,single-endedinputvoltagerangesbasedontheconfigurationoftheprogramregisters.AsexplainedintheRANGE_SEL_REGregister,theinputvoltagerangeforeachanalogchannelcanbeconfiguredtobipolar±3×VREF,±2.5×VREF,±1.5×VREF,±1.25×VREF,and±0.625×VREForunipolar0to3×VREF,0to2.5×VREF,0to1.5×VREFand0to1.25×VREF.Withtheinternalorexternalreferencevoltagesetto4.096V,theinputrangesofthedevicecanbeconfiguredtobipolarrangesof±12.288V,±10.24V,±6.144V,±5.12V,and±2.56Vorunipolarrangesof0Vto12.288V,0Vto10.24V,0Vto6.144V,and0Vto5.12V. Thedevicesamplesthevoltagedifference(AIN_P–AIN_GND)betweentheanaloginputandtheAIN_GNDpin.Thedeviceallowsa±0.1-VrangeontheAIN_GNDpin.Thisfeatureisusefulinmodularsystemswherethesensororsignal-conditioningblockisfurtherawayfromtheADContheboardandwhenadifferenceinthegroundpotentialofthesensororsignalconditionerfromtheADCgroundispossible.Insuchcases,runningseparatewiresfromtheAIN_GNDpinofthedevicetothesensororsignal-conditioninggroundismended.Inordertoobtainoptimumperformance,theinputcurrentsandimpedancesalongeachinputpatharemendedtobematched.Thetwosingle-endedsignalstoAIN_PandAIN_GNDmustberoutedassymmetricallyaspossiblefromthesignalsourcetotheADCinputpins. Iftheanaloginputpin(AIN_P)tothedeviceisleftfloating,theoutputoftheADCcorrespondstoaninternalbiasingvoltage.TheoutputfromtheADCmustbeconsideredasinvalidifthedeviceisoperatedwithfloatinginputpins.Thisconditiondoesnotcauseanydamagetothedevice,whichesfullyfunctionalwhenavalidinputvoltageisappliedtothepins. 7.3.2AnalogInputImpedance Thedevicepresentsaresistiveinputimpedance≥1MΩoneachoftheanaloginputs.TheinputimpedanceisindependentoftheADCsamplingfrequencyortheinputsignalfrequency.TheprimaryadvantageofsuchhighimpedanceinputsistheeaseofdrivingtheADCinputswithoutrequiringdrivingamplifierswithlowoutputimpedance.Bipolar,high-voltagepowersuppliesarenotrequiredinthesystembecausethisADCdoesnotrequireanyhigh-voltage,front-enddrivers.Inmostapplications,thesignalsourcesorsensoroutputscanbedirectlyconnectedtotheADCinput,thussignificantlysimplifyingthedesignofthesignalchain. Inordertomaintainthedcuracyofthesystem,matchingtheexternalsourceimpedanceontheAIN_PinputpinwithanequivalentresistanceontheAIN_GNDpinismended.Thismatchinghelpscancelanyadditionaloffseterrorcontributedbytheexternalresistance. Copyright©2016,TexasInstrumentsIncorporated 21 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 FeatureDescription(continued) 7.3.3InputProtectionCircuit Thedevicefeaturesaninternalovervoltageprotection(OVP)circuitoneachoftheanaloginputs.Usetheinternalprotectioncircuitonlyasasecondaryprotectionscheme.Theexternalprotectiondevicesintheendapplicationarehighlymendedtobeusedtoprotectagainstsurges,electrostaticdischarge(ESD),andelectricalfasttransient(EFT)conditions.AconceptualblockdiagramoftheinternalOVPcircuitisshowninFigure47. AVDDVP+ RFB 0V ESD AVDD VP- RS AIN_
P RS AIN_GND 1MŸD1pD2p AVDDD1n V± V+ + 1MŸ D2n RDCESD VOUT VBGND Figure47.InputOvervoltageProtectionCircuitSchematic AsshowninFigure47,binationofthe1-MΩ(or,1.2MΩforappropriateinputranges)inputresistorsalongwiththePGAgain-settingresistorsRFBandRDClimitthecurrentflowingintotheinputpin.binationofanti-paralleldiodes,D1andD2areaddedtoprotecttheinternalcircuitryandsettheovervoltageprotectionlimits. Table1explainsthevariousoperatingconditionsforthedevicewhenpoweredon.Thistableindicatesthatwhenthedeviceisproperlypoweredup(AVDD=5V)oroffersalowimpedanceof<30kΩ,theinternalovervoltageprotectioncircuitcanwithstandupto±20Vontheanaloginputpins. Table1.InputOvervoltageProtectionLimitsWhenAVDD=5VorOffersaLowImpedanceof<30kΩ
(1) INPUTCONDITION(VOVP=±20V) CONDITION RANGE |VIN|<|VRANGE| Withinoperatingrange |VRANGE|<|VIN|<|VOVP| Beyondoperatingrangebutwithinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges Allinputranges ADCOUTPUT COMMENTS ValidSaturatedSaturated Devicefunctionsasperdatasheetspecifications. ADCoutputissaturated,butdeviceisinternallyprotected(notmendedforextendedtime).Thisusageconditioncancauseirreversibledamagetothedevice.
(1)GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. 22 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 TheresultsindicatedinTable1arebasedonanassumptionthattheanaloginputpinisdrivenbyaverylowimpedancesource(RSisapproximately0Ω).However,ifthesourcedrivingtheinputhashigherimpedance,thecurrentflowingthroughtheprotectiondiodesreducesfurther,therebyincreasingtheOVPvoltagerange.Notethathighersourceimpedancesresultingainerrorsandcontributetooverallsystemnoiseperformance. Figure48showsthevoltageversuscurrentresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceispoweredon.ordingtothiscurrent-to-voltage(I-V)response,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩ(or1.2MΩforappropriateinputranges)inputimpedance.However,forvoltagesbeyond±20V,theinternalnodevoltagessurpassthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. ThesameovervoltageprotectioncircuitalsoprovidesprotectiontothedevicewhenthedeviceisnotpoweredonandAVDDisfloatingwithanimpedance>30kΩ.ThisconditioncanarisewhentheinputsignalsareappliedbeforetheADCisfullypoweredon.TheovervoltageprotectionlimitsforthisconditionareshowninTable2. Table2.InputOvervoltageProtectionLimitsWhenAVDD=FloatingwithImpedance>30kΩ
(1) CONDITION INPUTCONDITION(VOVP=±11V) RANGE |VIN|<|VOVP| Withinovervoltagerange |VIN|>|VOVP| Beyondovervoltagerange TESTCONDITION Allinputranges Allinputranges ADCOUTPUT COMMENTS InvalidInvalid DeviceisnotfunctionalbutisprotectedinternallybytheOVPcircuit. Thisusageconditioncancauseirreversibledamagetothedevice.
(1)AVDD=floating,GND=0V,AIN_GND=0V,|VRANGE|isthemaximuminputvoltageforanyselectedinputrange,and|VOVP|isthebreak-downvoltagefortheinternalOVPcircuit.AssumethatRSisapproximately0Ω. Figure49showstheI-Vresponseoftheinternalovervoltageprotectioncircuitwhenthedeviceisnotpoweredon.ordingtothisI-Vresponse,thecurrentflowingintothedeviceinputpinislimitedbythe1-MΩinputimpedance.However,forvoltagesbeyond±11V,theinternalnodevoltagesurpassesthebreak-downvoltageforinternaltransistors,thussettingthelimitforovervoltageprotectionontheinputpin. InputCurrent(uA)InputCurrent(uA) 30 20 10
0 -10 -20 -30 -30-24-18-12-60612182430 Inputvoltage(V) D005 241812 60-6-12-18-24-20-16-12-8-4048 Inputvoltage(V) 121620 D006 Figure48.I-VCurvefortheInputOVPCircuit(AVDD=5V) Figure49.I-VCurvefortheInputOVPCircuit(AVDD=Floating) Copyright©2016,TexasInstrumentsIncorporated 23 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3.4ProgrammableGainAmplifier(PGA) Thedevicefeaturesaprogrammablegainamplifier(PGA)aspartoftheanalogsignal-conditioningcircuitthatconvertstheoriginalsingle-endedinputsignalintoafully-differentialsignaltodrivetheinternalSARADC.ThePGAalsoadjustsmon-modeleveloftheinputsignalbeforefeedingitintotheSARADCtoensuremaximumusageoftheADCinputdynamicrange.Dependingontherangeoftheinputsignal,thePGAgaincanbeadjustedbysettingtheRANGE_SEL[3:0]bitsintheconfigurationregister(seetheRANGE_SEL_REGregister).Thedefaultorpower-onstatefortheRANGE_SEL[3:0]bitsis0000,correspondingtoaninputsignalrangeof±3×VREF.Table3liststhevariousconfigurationsoftheRANGE_SEL[3:0]bitsforthedifferentanaloginputvoltageranges. ThePGAusesaworkofresistorsformultiplegainconfigurations.Matchingbetweentheseresistorsisuratelytrimmedtokeeptheoverallgainerrorlowacrossallinputranges. Table3.InputRangeSelectionBitsConfiguration ANALOGINPUTRANGE ±3×VREF±2.5×VREF±1.5×VREF±1.25×VREF±0.625×VREF0–3×VREF0–2.5×VREF0–1.5×VREF0–1.25×VREF BIT3000001111 RANGE_SEL[3:0] BIT2 BIT1
0 0
0 0
0 1
0 1
1 0
0 0
0 0
0 1
0 1 BIT0010100101 7.3.5Second-Order,Low-PassFilter(LPF) Inordertomitigatethenoiseofthefront-endamplifierandgainresistorsofthePGA,theAFEcircuitofthedevicefeaturesasecond-order,antialiasingLPFattheoutputofthePGA.ThemagnitudeandphaseresponseoftheanalogantialiasingfilterareshowninFigure50andFigure51,respectively.Formaximumperformance,the–3-dBcutofffrequencyfortheantialiasingfilteristypicallysetto15kHz.TheperformanceofthefilterisconsistentacrossallinputrangessupportedbytheADC. Magnitude(dB)Phase(Degree) 30-3-6-9-12-1510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D058 45
0 -45 -90 -13510 ±12.288V±10.24V±6.144V±5.12V±2.56V0-12.288V0-10.24V0-6.144V0-5.12V 100 1k 10k InputFrequency(Hz) 100k D059 Figure50.Second-OrderLPFMagnitudeResponse Figure51.Second-OrderLPFPhaseResponse 24 Copyright©2016,TexasInstrumentsIncorporated ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 7.3.6ADCDriver Inordertomeettheperformanceofthedeviceatthemaximumsamplingrate,thesample-and-holdcapacitorsattheinputoftheADCmustbeessfullychargedanddischargedduringtheacquisitiontimewindow.ThisdriverequirementattheinputoftheADCnecessitatestheuseofahigh-bandwidth,low-noise,andstableamplifierbuffer.Suchaninputdriverisintegratedinthefront-endsignalpathoftheanaloginputchannelofthedevice. 7.3.7Reference Thedevicecanoperatewitheitheraninternalvoltagereferenceoranexternalvoltagereferenceusingtheinternalbuffer.TheinternalorexternalreferenceselectionisdeterminedbyprogrammingtheINTREF_DISbitoftheRANGE_SEL_REGregister.Theinternalreferencesourceisenabled(INTREF_DIS=0)bydefaultafterresetorwhenthedevicepowersup.TheINTREF_DISbitmustbeprogrammedtologic1todisabletheinternalreferencesourcewheneveranexternalreferencesourceisused. 7.3.7.1InternalReference Thedevicefeaturesaninternalreferencesourcewithanominaloutputvalueof4.096V.Inordertoselecttheinternalreference,theINTREF_DISbitoftheRANGE_SEL_REGregistermustbeprogrammedtologic0.Whentheinternalreferenceisused,theREFIOpinesanoutputwiththeinternalreferencevalue.A4.7-µF(minimum)decouplingcapacitorismendedtobeplacedbetweentheREFIOpinandREFGND,asshowninFigure52.ThecapacitormustbeplacedasclosetotheREFIOpinaspossible.Theoutputimpedanceoftheinternalband-gapcircuitcreatesalow-passfilterwiththiscapacitortoband-limitthenoiseofthereference.TheuseofasmallercapacitorvalueallowshigherreferencenoiseinthesystemthatcanpotentiallydegradeSNRandSINADperformance.TheREFIOpinmustnotbeusedtodriveexternalacordcloadsbecauseoflimitedcurrentoutputcapability.TheREFIOpincanbeusedasasourceiffollowedbyasuitableopampbuffer(suchastheOPA320). AVDD 4.096VREF RANGE_SEL_REG[6]=0(INTREF_DIS)REFIO REFCAP ADC REFGNDAGND 4.7PF 1PF 10PF Figure52.DeviceConnectionsforUsinganInternal4.096-VReference Copyright©2016,TexasInstrumentsIncorporated 25 ADS8661,ADS8665 ZHCSFU0–DECEMBER2016 Thedeviceinternalreferenceisfactory-trimmedtoensuretheinitialuracyspecification.ThehistograminFigure53showsthedistributionoftheinternalvoltagereferenceoutputtakenfrommorethan3420productiondevices. NumberofDevices 1000 900 800 700 600 500 400 300 200 100
0 4.0944.09454.0954.09554.0964.09654.0974.09754.098 REFIOVoltage(V) D060 Figure53.InternalReferenceuracyHistogramatRoomTemperature Theinitialuracyspecificationfortheinternalreferencecanbedegradedifthedieisexposedtoanymechanicalorthermalstress.Heatingthedevicewhenbeingsolderedtoaprintedcircuitboard(PCB)andanysubsequentsolderreflowisaprimarycauseforshiftsintheVREFvalue.Themaincauseofthermalhysteresisisachangeindiestressandisthereforeafunctionofthepackage,die-attachmaterial,andpound,aswellasthelayoutofthedeviceitself. Inordertoillustratethiseffect,30devicesweresolderedusinglead-freesolderpastewiththemanufacturersuggestedreflowprofile,asexplainedinapplicationreportAN-2029Handling&Processmendations(SNOA550).Theinternalvoltagereferenceoutputismeas
声明：
该资讯来自于互联网网友发布，如有侵犯您的权益请联系我们。
上一篇转换器,ADS8634
下一篇类放大器,Product