AtmelATmega640/V-1280/V-1281/V-2560/V-2561/V 8-bitAtmelMicrocontrollerwith16/32/64KBIn-SystemProgrammableFlash Features •HighPerformance,LowPowerAtmel®AVR®8-BitMicrocontroller•AdvancedRISCArchitecture –135PowerfulInstructions–MostSingleClockCycleExecution –32×8GeneralPurposeWorkingRegisters –FullyStaticOperation –Upto16MIPSThroughputat16MHz –On-Chip2-cycleMultiplier •HighEnduranceNon-volatileMemorySegments –64K/128K/256KBytesofIn-SystemSelf-ProgrammableFlash –4KbytesEEPROM –8KbytesInternalSRAM –Write/EraseCycles:10,000Flash/100,000EEPROM–Dataretention:20yearsat85C/100yearsat25
C –OptionalBootCodeSectionwithIndependentLockBits •In-SystemProgrammingbyOn-chipBootProgram•TrueRead-While-WriteOperation–ProgrammingLockforSoftwareSecurity ••Endurance:Upto64KbytesOptionalExternalMemorySpace Atmel®QTouch®librarysupport –Capacitivetouchbuttons,slidersandwheels –QTouchandQMatrixacquisition–Upto64sensechannels •JTAG(IEEE®std.pliant)Interface –Boundary-scanCapabilitiesordingtotheJTAGStandard –ExtensiveOn-chipDebugSupport–ProgrammingofFlash,EEPROM,Fuses,andLockBitsthroughtheJTAGInterface •PeripheralFeatures –Two8-bitTimer/CounterswithSeparatePrescalerandCompareMode –Four16-bitTimer/CounterwithSeparatePrescaler,Compare-andCaptureMode–RealTimeCounterwithSeparateOscillator–Four8-bitPWMChannels –Six/TwelvePWMChannelswithProgrammableResolutionfrom2to16Bits(ATmega1281/2561,ATmega640/1280/2560) –OutputCompareModulator –8/16-channel,10-bitADC(ATmega1281/2561,ATmega640/1280/2560)–Two/FourProgrammableSerialUSART(ATmega1281/2561,ATmega640/1280/2560)–Master/SlaveSPISerialInterface –ByteOriented2-wireSerialInterface–ProgrammableWatchdogTimerwithSeparateOn-chipOscillator–On-chipAnalogComparator –InterruptandWake-uponPinChange •SpecialMicrocontrollerFeatures –Power-onResetandProgrammableBrown-outDetection–InternalCalibratedOscillator –ExternalandInternalInterruptSources–SixSleepModes:Idle,ADCNoiseReduction,Power-save,Power-down,Standby, andExtendedStandby •I/OandPackages –54/86ProgrammableI/OLines(ATmega1281/2561,ATmega640/1280/2560)–64-padQFN/MLF,64-leadTQFP(ATmega1281/2561)–100-leadTQFP,100-ballCBGA(ATmega640/1280/2560) –RoHS/FullyGreen •TemperatureRange: –-40Cto85CIndustrial •Ultra-LowPowerConsumption –ActiveMode:1MHz,1.8V:500µ
A –Power-downMode:0.1µAat1.8V •SpeedGrade: –ATmega640V/ATmega1280V/ATmega1281V: •0-4MHz@1.8V-5.5V,0-8MHz@2.7V-5.5V–ATmega2560V/ATmega2561V: •0-2MHz@1.8V-5.5V,0-8MHz@2.7V-5.5V–ATmega640/ATmega1280/ATmega1281: •0-8MHz@2.7V-5.5V,0-16MHz@4.5V-5.5V–ATmega2560/ATmega2561: •0-16MHz@4.5V-5.5V SUMMARY 2549QS–AVR–02/2014
1.PinConfigurations Figure1-
1.TQFP-pinoutATmega640/1280/2560 AVCCGNDAREFPF0(ADC0)PF1(ADC1)PF2(ADC2)PF3(ADC3)PF4(ADC4/TCK)PF5(ADC5/TMS)PF6(ADC6/TDO)PF7(ADC7/TDI)PK0(ADC8/PCINT16)PK1(ADC9/PCINT17)PK2(ADC10/PCINT18)PK3(ADC11/PCINT19)PK4(ADC12/PCINT20)PK5(ADC13/PCINT21)PK6(ADC14/PCINT22)PK7(ADC15/PCINT23)GNDVCCPJ7PA0(AD0)PA1(AD1)PA2(AD2) 100999897969594939291908988878685848382818079787776 (OC0B)PG51(RXD0/PCINT8)PE02 (TXD0)PE13(XCK0/AIN0)PE24(OC3A/AIN1)PE35(OC3B/INT4)PE46(OC3C/INT5)PE57 (T3/INT6)PE68(CLKO/ICP3/INT7)PE79 VCC10GND11(RXD2)PH012(TXD2)PH113(XCK2)PH214(OC4A)PH315(OC4B)PH416(OC4C)PH517(OC2B)PH618(SS/PCINT0)PB019(SCK/PCINT1)PB120(MOSI/PCINT2)PB221(MISO/PCINT3)PB322(OC2A/PCINT4)PB423(OC1A/PCINT5)PB524(OC1B/PCINT6)PB625 INDEXCORNER 75PA3(AD3)74PA4(AD4)73PA5(AD5)72PA6(AD6)71PA7(AD7)70PG2(ALE)69PJ6(PCINT15)68PJ5(PCINT14)67PJ4(PCINT13)66PJ3(PCINT12)65PJ2(XCK3/PCINT11)64PJ1(TXD3/PCINT10)63PJ0(RXD3/PCINT9)62GND61VCC60PC7(A15)59PC6(A14)58PC5(A13)57PC4(A12)56PC3(A11)55PC2(A10)54PC1(A9)53PC0(A8)52PG1(RD)51PG0(WR) 26272829303132333435363738394041424344454647484950 (OC0A/OC1C/PCINT7)PB7(T4)PH7 (TOSC2)PG3(TOSC1)PG4 RESETVCCGND XTAL2XTAL1(ICP4)PL0(ICP5)PL1(T5)PL2(OC5A)PL3(OC5B)PL4(OC5C)PL5 PL6PL7(SCL/INT0)PD0(SDA/INT1)PD1(RXD1/INT2)PD2(TXD1/INT3)PD3(ICP1)PD4(XCK1)PD5(T1)PD6(T0)PD7 ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
2 2549QS–AVR–02/2014 Figure1-
2.CBGA-pinoutATmega640/1280/2560 Topview 12345678910 ABCDEFGHJK Bottomview 10987654321 ABCDEFGHJK Table1-
1.CBGA-pinoutATmega640/1280/2560
1 2
3 4
5 6
7 8
A GND AREF PF0 PF2 PF5 PK0 PK3 PK6
B AVCC PG5 PF1 PF3 PF6 PK1 PK4 PK7
C PE2 PE0 PE1 PF4 PF7 PK2 PK5 PJ7
D PE3 PE4 PE5 PE6 PH2 PA4 PA5 PA6
E PE7 PH0 PH1 PH3 PH5 PJ6 PJ5 PJ4
F VCC PH4 PH6 PB0 PL4 PD1 PJ1 PJ0
G GND PB1 PB2 PB5 PL2 PD0 PD5 PC5
H PB3 PB4 RESET PL1 PL3 PL7 PD4 PC4
J PH7 PG3 PB6 PL0 XTAL2 PL6 PD3 PC1
K PB7 PG4 VCC GND XTAL1 PL5 PD2 PD6 Note:
Thefunctionsforeachpinisthesameasforthe100pinpackagesshowninFigure1-1onpage2. 9GNDPA0PA1PA7PJ3PC7PC6PC3PC0PD7 10VCCPA2PA3PG2PJ2GNDVCCPC2PG1PG0 ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
3 2549QS–AVR–02/2014 Figure1-
3.PinoutATmega1281/2561 (OC0B)PG51(RXD0/PCINT8/PDI)PE02 (TXD0/PDO)PE13(XCK0/AIN0)PE24(OC3A/AIN1)PE35(OC3B/INT4)PE46(OC3C/INT5)PE57 (T3/INT6)PE68(ICP3/CLKO/INT7)PE79 (SS/PCINT0)PB010(SCK/PCINT1)PB111(MOSI/PCINT2)PB212(MISO/PCINT3)PB313(OC2A/PCINT4)PB414(OC1A/PCINT5)PB515(OC1B/PCINT6)PB616 INDEXCORNER 64AVCC63GND62AREF61PF0(ADC0)60PF1(ADC1)59PF2(ADC2)58PF3(ADC3)57PF4(ADC4/TCK)56PF5(ADC5/TMS)55PF6(ADC6/TDO)54PF7(ADC7/TDI)53GND52VCC51PA0(AD0)50PA1(AD1)49PA2(AD2) 48PA3(AD3)47PA4(AD4)46PA5(AD5)45PA6(AD6)44PA7(AD7)43PG2(ALE)42PC7(A15)41PC6(A14)40PC5(A13)39PC4(A12)38PC3(A11)37PC2(A10)36PC1(A9)35PC0(A8)34PG1(RD)33PG0(WR) (OC0A/OC1C/PCINT7)PB717(TOSC2)PG318(TOSC1)PG419RESET20VCC21GND22XTAL223XTAL124 (SCL/INT0)PD025(SDA/INT1)PD126(RXD1/INT2)PD227(TXD1/INT3)PD328 (ICP1)PD429(XCK1)PD530 (T1)PD631(T0)PD732 Note: ThelargecenterpadunderneaththeQFN/MLFpackageismadeofmetalandinternallyconnectedtoGND.Itshouldbesolderedorgluedtotheboardtoensuregoodmechanicalstability.Ifthecenterpadisleftunconnected,thepackagemightloosenfromtheboard. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
4 2549QS–AVR–02/2014
2.Overview TheATmega640/1280/1281/2560/2561isalow-powerCMOS8-bitmicrocontrollerbasedontheAVRenhancedRISCarchitecture.Byexecutingpowerfulinstructionsinasingleclockcycle,theATmega640/1280/1281/2560/2561achievesthroughputsapproaching1MIPSperMHzallowingthesystemdesignertooptimizepowerconsumptionversusprocessingspeed. 2.1BlockDiagram Figure2-
1.BlockDiagram VCC PF7..0 PK7..0 PJ7..0 PE7..0 RESETGND XTAL1XTAL2PA7..0PG5..0 PowerSupervisionPOR/BOD& RESET WatchdogTimer WatchdogOscillator OscillatorCircuits/ ClockGeneration PORTA
(8) PORTG
(6) PORTF
(8) PORTK
(8) PORTJ
(8) PORTE
(8) JTAGEEPROM XRAM A/DConverter InternalBandgapreference CPU AnalogComparator 16bitT/C316bitT/C5 16bitT/C4 FLASH SRAM 16bitT/C1 USART0USART3USART1 PC7..0 PORTC
(8) TWI SPI 8bitT/C0 8bitT/C2 USART2 NOTE:Shadedpartsonlyavailableinthe100-pinversion. CompletefunctionalityfortheADC,T/C4,andT/C5onlyavailableinthe100-pinversion. PORTD
(8) PORTB
(8) PORTH
(8) PORTL
(8) PD7..0 PB7..0 PH7..0 PL7..0 TheAtmel®AVR®binesarichinstructionsetwith32generalpurposeworkingregisters.Allthe32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU),allowingtwoindependentregisterstobeessedinonesingleinstructionexecutedinoneclockcycle.TheresultingarchitectureismorecodeefficientwhileachievingthroughputsuptotentimesfasterthanconventionalCISCmicrocontrollers. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
5 2549QS–AVR–02/2014 TheATmega640/1280/1281/2560/2561providesthefollowingfeatures:64K/128K/256KbytesofIn-SystemProgrammableFlashwithRead-While-Writecapabilities,4KbytesEEPROM,8KbytesSRAM,54/86generalpurposeI/Olines,32generalpurposeworkingregisters,RealTimeCounter(RTC),sixflexibleTimer/CountersparemodesandPWM,fourUSARTs,abyteoriented2-wireSerialInterface,a16-channel,10-bitADCwithoptionaldifferentialinputstagewithprogrammablegain,programmableWatchdogTimerwithInternalOscillator,anSPIserialport,IEEE®std.pliantJTAGtestinterface,alsousedforessingtheOn-chipDebugsystemandprogrammingandsixsoftwareselectablepowersavingmodes.TheIdlemodestheCPUwhileallowingtheSRAM,Timer/Counters,SPIport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheregistercontentsbutfreezestheOscillator,disablingallotherchipfunctionsuntilthenextinterruptorHardwareReset.InPower-savemode,theasynchronoustimercontinuestorun,allowingtheusertomaintainatimerbasewhiletherestofthedeviceissleeping.TheADCNoiseReductionmodestheCPUandallI/OmodulesexceptAsynchronousTimerandADC,tominimizeswitchingnoiseduringADCconversions.InStandbymode,theCrystal/ResonatorOscillatorisrunningwhiletherestofthedeviceissleeping.Thisallowsveryfastbinedwithlowpowerconsumption.InExtendedStandbymode,boththemainOscillatorandtheAsynchronousTimercontinuetorun. AtmelofferstheQTouch®libraryforembeddingcapacitivetouchbuttons,slidersandwheelsfunctionalityintoAVRmicrocontrollers.Thepatentedcharge-transfersignalacquisitionoffersrobustsensingandincludesfullydebouncedreportingoftouchkeysandincludesAdjacentKeySuppression®(AKS®)technologyforunambiguousdetectionofkeyevents.Theeasy-to-useQTouchSuitetoolchainallowsyoutoexplore,developanddebugyourowntouchapplications. ThedeviceismanufacturedusingtheAtmelhigh-densitynonvolatilememorytechnology.TheOn-chipISPFlashallowstheprogrammemorytobereprogrammedin-systemthroughanSPIserialinterface,byaconventionalnonvolatilememoryprogrammer,orbyanOn-chipBootprogramrunningontheAVRcore.ThebootprogramcanuseanyinterfacetodownloadtheapplicationprogramintheapplicationFlashmemory.SoftwareintheBootFlashsectionwillcontinuetorunwhiletheApplicationFlashsectionisupdated,providingtrueRead-While-Writeoperation.biningan8-bitRISCCPUwithIn-SystemSelf-ProgrammableFlashonamonolithicchip,theAtmelATmega640/1280/1281/2560/2561isapowerfulmicrocontrollerthatprovidesahighlyflexibleandcosteffectivesolutiontomanyembeddedcontrolapplications. TheATmega640/1280/1281/2560/2561AVRissupportedwithafullsuiteofprogramandsystemdevelopmenttoolsincluding:pilers,macroassemblers,programdebugger/simulators,in-circuitemulators,andevaluationkits. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
6 2549QS–AVR–02/2014 2.2ComparisonBetweenATmega1281/2561andATmega640/1280/2560 EachdeviceintheATmega640/1280/1281/2560/2561familydiffersonlyinmemorysizeandnumberofpins.Table2-1summarizesthedifferentconfigurationsforthesixdevices. Table2-
1.ConfigurationSummary DeviceATmega640ATmega1280ATmega1281ATmega2560ATmega2561 Flash64KB128KB128KB256KB256KB EEPROM4KB4KB4KB4KB4KB RAM8KB8KB8KB8KB8KB GeneralPurposeI/Opins 8686548654 16bitsresolutionPWMchannels12126126 SerialUSARTs 44242 ADCChannels 16168168 2.3PinDescriptions 2.3.1VCC 2.3.2 Digitalsupplyvoltage.GND 2.3.3 Ground.PortA(PA7..PA0) 2.3.4 PortAisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortAoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortApinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortApinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortAalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage75. PortB(PB7..PB0) 2.3.5 PortBisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortBoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortBpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortBpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortBhasbetterdrivingcapabilitiesthantheotherports. PortBalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage76. PortC(PC7..PC0) PortCisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortCoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortCpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortCpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortCalsoservesthefunctionsofspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage79. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
7 2549QS–AVR–02/2014 2.3.6PortD(PD7..PD0) 2.3.7 PortDisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortDoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortDpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortDpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortDalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage80. PortE(PE7..PE0) 2.3.8 PortEisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortEoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortEpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortEpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortEalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage82. PortF(PF7..PF0) 2.3.9 PortFservesasanaloginputstotheA/DConverter. PortFalsoservesasan8-bitbi-directionalI/Oport,iftheA/DConverterisnotused.Portpinscanprovideinternalpull-upresistors(selectedforeachbit).ThePortFoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortFpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortFpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning.IftheJTAGinterfaceisenabled,thepull-upresistorsonpinsPF7(TDI),PF5(TMS),andPF4(TCK)willbeactivatedevenifareseturs. PortFalsoservesthefunctionsoftheJTAGinterface. PortG(PG5..PG0) PortGisa6-bitI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortGoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortGpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortGpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortGalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/1281/2560/2561aslistedonpage86. 2.3.10PortH(PH7..PH0) PortHisa8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortHoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortHpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortHpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortHalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/2560aslistedonpage88. 2.3.11PortJ(PJ7..PJ0) PortJisa8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortJoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortJpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortJpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning.PortJalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/2560aslistedonpage90. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
8 2549QS–AVR–02/2014 2.3.12PortK(PK7..PK0) PortKservesasanaloginputstotheA/DConverter. PortKisa8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortKoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortKpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortKpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortKalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/2560aslistedonpage92. 2.3.13PortL(PL7..PL0) PortLisa8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).ThePortLoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.Asinputs,PortLpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.ThePortLpinsaretri-statedwhenaresetconditionesactive,eveniftheclockisnotrunning. PortLalsoservesthefunctionsofvariousspecialfeaturesoftheATmega640/1280/2560aslistedonpage94. 2.3.14RESET Resetinput.Alowlevelonthispinforlongerthantheminimumpulselengthwillgenerateareset,eveniftheclockisnotrunning.Theminimumpulselengthisgivenin“SystemandResetCharacteristics”onpage360.Shorterpulsesarenotguaranteedtogenerateareset. 2.3.15XTAL1 InputtotheinvertingOscillatoramplifierandinputtotheinternalclockoperatingcircuit.2.3.16XTAL2 OutputfromtheinvertingOscillatoramplifier.2.3.17AVCC 2.3.18 AVCCisthesupplyvoltagepinforPortFandtheA/DConverter.ItshouldbeexternallyconnectedtoVCC,eveniftheADCisnotused.IftheADCisused,itshouldbeconnectedtoVCCthroughalow-passfilter. AREF ThisistheanalogreferencepinfortheA/DConverter. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY]
9 2549QS–AVR–02/2014
3.Resources prehensivesetofdevelopmenttoolsandapplicationnotes,anddatasheetsareavailablefordownloadon/avr.
4.AboutCodeExamples Thisdocumentationcontainssimplecodeexamplesthatbrieflyshowhowtousevariouspartsofthedevice.BeawarethatnotallpilervendorsincludebitdefinitionsintheheaderfilesandinterrupthandlinginCpilerdependent.Confirmwiththepilerdocumentationformoredetails. Thesecodeexamplesassumethatthepartspecificheaderfileisincludedpilation.ForI/OregisterslocatedinextendedI/Omap,"IN","OUT","SBIS","SBIC","CBI",and"SBI"instructionsmustbereplacedwithinstructionsthatallowesstoextendedI/O.Typically"LDS"and"STS"binedwith"SBRS","SBRC","SBR",and"CBR".
5.DataRetention ReliabilityQualificationresultsshowthattheprojecteddataretentionfailurerateismuchlessthan1ppmover20yearsat85°Cor100yearsat25°
C. 6.Capacitivetouchsensing TheAtmel®QTouch®LibraryprovidesasimpletousesolutiontorealizetouchsensitiveinterfacesonmostAtmelAVR®microcontrollers.TheQTouchLibraryincludessupportfortheQTouchandQMatrixacquisitionmethods. TouchsensingcanbeaddedtoanyapplicationbylinkingtheappropriateAtmelQTouchLibraryfortheAVRMicrocontroller.ThisisdonebyusingasimplesetofAPIstodefinethetouchchannelsandsensors,andthencallingthetouchsensingAPI’storetrievethechannelinformationanddeterminethetouchsensorstates. TheQTouchLibraryisFREEanddownloadablefromtheAtmelwebsiteatthefollowinglocation:/qtouchlibrary.Forimplementationdetailsandotherinformation,refertotheAtmelQTouchLibraryUserGuide-alsoavailablefordownloadfromtheAtmelwebsite. ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY] 10 2549QS–AVR–02/2014
7.RegisterSummary Address (0x1FF)... (0x13F)(0x13E)(0x13D)(0x13C)(0x13B)(0x13A)(0x139)(0x138)(0x137)(0x136)(0x135)(0x134)(0x133)(0x132)(0x131)(0x130)(0x12F)(0x12E)(0x12D)(0x12C)(0x12B)(0x12A)(0x129)(0x128)(0x127)(0x126)(0x125)(0x124)(0x123)(0x122)(0x121)(0x120)(0x11F)(0x11E)(0x11D)(0x11C)(0x11B)(0x11A)(0x119)(0x118)(0x117)(0x116)(0x115)(0x114)(0x113)(0x112)(0x111)(0x110)(0x10F)(0x10E)(0x10D)(0x10C)(0x10B)(0x10A)(0x109)(0x108)(0x107)(0x106)(0x105)(0x104)(0x103)(0x102)(0x101) Name ReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReserved UDR3UBRR3HUBRR3LReservedUCSR3CUCSR3BUCSR3AReservedReservedOCR5CHOCR5CLOCR5BHOCR5BLOCR5AHOCR5AL ICR5HICR5LTCNT5HTCNT5LReservedTCCR5CTCCR5BTCCR5AReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedPORTLDDRLPINLPORTKDDRKPINKPORTJDDRJPINJPORTHDDRH Bit7 - - UMSEL31RXCIE3 RXC3- FOC5AICNC5COM5A1 PORTL7DDL7PINL7PORTK7DDK7PINK7PORTJ7DDJ7PINJ7PORTH7DDH7 Bit6 - - UMSEL30 TXCIE3TXC3 - FOC5BICES5COM5A0 PORTL6DDL6PINL6PORTK6DDK6PINK6PORTJ6DDJ6PINJ6PORTH6DDH6 Bit5 - Bit4 - Bit3 - Bit2 - Bit1 - Bit0 - USART3I/ODataRegister - - USART3BaudRateRegisterHighByte USART3BaudRateRegisterLowByte - - - - - UPM31 UPM30 USBS3 UCSZ31 UCSZ30 UDRIE3 RXEN3 TXEN3 UCSZ32 RXB83 UDRE3 FE3 DOR3 UPE3 U2X3 - - - - - - - - - - Timer/Counter5
-OutputCompareRegisterCHighByte Timer/Counter5-OutputCompareRegisterCLowByte Timer/Counter5-OutputCompareRegisterBHighByte Timer/Counter5-OutputCompareRegisterBLowByte Timer/Counter5-OutputCompareRegisterAHighByte Timer/Counter5-OutputCompareRegisterALowByte Timer/Counter5-InputCaptureRegisterHighByte Timer/Counter5-InputCaptureRegisterLowByte Timer/Counter5-CounterRegisterHighByte Timer/Counter5-CounterRegisterLowByte - - - - - FOC5C - - - - - WGM53 WGM52 CS52 CS51 COM5B1 COM5B0 COM5C1 COM5C0 WGM51 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - PORTL5 PORTL4 PORTL3 PORTL2 PORTL1 DDL5 DDL4 DDL3 DDL2 DDL1 PINL5 PINL4 PINL3 PINL2 PINL1 PORTK5 PORTK4 PORTK3 PORTK2 PORTK1 DDK5 DDK4 DDK3 DDK2 DDK1 PINK5 PINK4 PINK3 PINK2 PINK1 PORTJ5 PORTJ4 PORTJ3 PORTJ2 PORTJ1 DDJ5 DDJ4 DDJ3 DDJ2 DDJ1 PINJ5 PINJ4 PINJ3 PINJ2 PINJ1 PORTH5 PORTH4 PORTH3 PORTH2 PORTH1 DDH5 DDH4 DDH3 DDH2 DDH1 UCPOL3
TXB83MPCM3 - CS50WGM50PORTL0DDL0PINL0PORTK0DDK0PINK0PORTJ0DDJ0PINJ0PORTH0DDH0 Page page218page222page222page235page234page233 page160page160page160page160page160page160page161page161page158page158page157page156page154 page100page100page100page99page99page99page99page99page99page98page99 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 11 2549QS–AVR–02/2014 Address (0x100)(0xFF)(0xFE)(0xFD)(0xFC)(0xFB)(0xFA)(0xF9)(0xF8)(0xF7)(0xF6)(0xF5)(0xF4)(0xF3)(0xF2)(0xF1)(0xF0)(0xEF)(0xEE)(0xED)(0xEC)(0xEB)(0xEA)(0xE9)(0xE8)(0xE7)(0xE6)(0xE5)(0xE4)(0xE3)(0xE2)(0xE1)(0xE0)(0xDF)(0xDE)(0xDD)(0xDC)(0xDB)(0xDA)(0xD9)(0xD8)(0xD7)(0xD6)(0xD5)(0xD4)(0xD3)(0xD2)(0xD1)(0xD0)(0xCF)(0xCE)(0xCD)(0xCC)(0xCB)(0xCA)(0xC9)(0xC8)(0xC7)(0xC6)(0xC5)(0xC4)(0xC3)(0xC2)(0xC1)(0xC0)(0xBF)(0xBE)(0xBD) Name PINHReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReservedReserved UDR2UBRR2HUBRR2LReservedUCSR2CUCSR2BUCSR2AReserved UDR1UBRR1HUBRR1LReservedUCSR1CUCSR1BUCSR1AReserved UDR0UBRR0HUBRR0LReservedUCSR0CUCSR0BUCSR0AReservedReservedTWAMR Bit7 PINH7- - UMSEL21RXCIE2 RXC2- - UMSEL11RXCIE1 RXC1- - UMSEL01RXCIE0 RXC0- TWAM6 Bit6 PINH6- - UMSEL20 TXCIE2TXC2 - - UMSEL10 TXCIE1TXC1 - - UMSEL00 TXCIE0TXC0 TWAM5 Bit5 PINH5- - UPM21UDRIE2UDRE2 - - UPM11UDRIE1UDRE1 - - UPM01UDRIE0UDRE0 TWAM4 Bit4 Bit3 Bit2 Bit1 Bit0 PINH4 PINH3 PINH2 PINH1 PINH0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - USART2
I/ODataRegister - USART2BaudRateRegisterHighByte USART2BaudRateRegisterLowByte - - - - - UPM20 USBS2 UCSZ21 UCSZ20 UCPOL2 RXEN2 TXEN2 UCSZ22 RXB82 TXB82 FE2 DOR2 UPE2 U2X2 MPCM2 - - - - - USART1
I/ODataRegister - USART1BaudRateRegisterHighByte USART1BaudRateRegisterLowByte - - - - - UPM10 USBS1 UCSZ11 UCSZ10 UCPOL1 RXEN1 TXEN1 UCSZ12 RXB81 TXB81 FE1 DOR1 UPE1 U2X1 MPCM1 - - - - - USART0
I/ODataRegister - USART0BaudRateRegisterHighByte USART0BaudRateRegisterLowByte - - - - - UPM00 USBS0 UCSZ01 UCSZ00 UCPOL0 RXEN0 TXEN0 UCSZ02 RXB80 TXB80 FE0 DOR0 UPE0 U2X0 MPCM0 - - - - - - - - - - TWAM3 TWAM2 TWAM1 TWAM0 - Page page
99 page218page222page222page235page234page233page218page222page222page235page234page233page218page222page222page235page234page234page264 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 12 2549QS–AVR–02/2014 Address (0xBC)(0xBB)(0xBA)(0xB9)(0xB8)(0xB7)(0xB6)(0xB5)(0xB4)(0xB3)(0xB2)(0xB1)(0xB0)(0xAF)(0xAE)(0xAD)(0xAC)(0xAB)(0xAA)(0xA9)(0xA8)(0xA7)(0xA6)(0xA5)(0xA4)(0xA3)(0xA2)(0xA1)(0xA0)(0x9F)(0x9E)(0x9D)(0x9C)(0x9B)(0x9A)(0x99)(0x98)(0x97)(0x96)(0x95)(0x94)(0x93)(0x92)(0x91)(0x90)(0x8F)(0x8E)(0x8D)(0x8C)(0x8B)(0x8A)(0x89)(0x88)(0x87)(0x86)(0x85)(0x84)(0x83)(0x82)(0x81)(0x80)(0x7F)(0x7E)(0x7D)(0x7C)(0x7B)(0x7A)(0x79) Name TWCRTWDRTWARTWSRTWBRReservedASSRReservedOCR2BOCR2ATCNT2TCCR2BTCCR2AReservedReservedOCR4CHOCR4CLOCR4BHOCR4BLOCR4AHOCR4ALICR4HICR4LTCNT4HTCNT4LReservedTCCR4CTCCR4BTCCR4AReservedReservedOCR3CHOCR3CLOCR3BHOCR3BLOCR3AHOCR3ALICR3HICR3LTCNT3HTCNT3LReservedTCCR3CTCCR3BTCCR3AReservedReservedOCR1CHOCR1CLOCR1BHOCR1BLOCR1AHOCR1ALICR1HICR1LTCNT1HTCNT1LReservedTCCR1CTCCR1BTCCR1ADIDR1DIDR0DIDR2ADMUXADCSRBADCSRAADCH Bit7 TWINTTWA6TWS7 - FOC2ACOM2A1 - FOC4AICNC4COM4A1 - FOC3AICNC3COM3A1 - FOC1AICNC1COM1A1 ADC7DADC15DREFS1 ADEN Bit6 TWEATWA5TWS6 EXCLK - FOC2BCOM2A0 - FOC4BICES4COM4A0 - FOC3BICES3COM3A0 - FOC1BICES1COM1A0 ADC6DADC14DREFS0ACMEADSC Bit5 Bit4 Bit3 Bit2 TWSTA TWSTO TWWC TWEN 2-wireSerialInterfaceDataRegister TWA4 TWA3 TWA2 TWA1 TWS5 TWS4 TWS3 - 2-wireSerialInterfaceBitRateRegister - - - - AS2 TCN2UB OCR2AUB OCR2BUB - - - - Timer/Counter2OutputCompareRegisterB Timer/Counter2OutputCompareRegisterA Timer/Counter2(8Bit) - - WGM22 CS22 COM2B1 COM2B0 - - - - - - - - - - Timer/Counter4-OutputCompareRegisterCHighByte Timer/Counter4-OutputCompareRegisterCLowByte Timer/Counter4-OutputCompareRegisterBHighByte Timer/Counter4-OutputCompareRegisterBLowByte Timer/Counter4-OutputCompareRegisterAHighByte Timer/Counter4-OutputCompareRegisterALowByte Timer/Counter4-InputCaptureRegisterHighByte Timer/Counter4-InputCaptureRegisterLowByte Timer/Counter4-CounterRegisterHighByte Timer/Counter4-CounterRegisterLowByte - - - - FOC4C - - - - WGM43 WGM42 CS42 COM4B1 COM4B0 COM4C1 COM4C0 - - - - - - - - Timer/Counter3
-OutputCompareRegisterCHighByte Timer/Counter3-OutputCompareRegisterCLowByte Timer/Counter3-OutputCompareRegisterBHighByte Timer/Counter3-OutputCompareRegisterBLowByte Timer/Counter3-OutputCompareRegisterAHighByte Timer/Counter3-OutputCompareRegisterALowByte Timer/Counter3-InputCaptureRegisterHighByte Timer/Counter3-InputCaptureRegisterLowByte Timer/Counter3-CounterRegisterHighByte Timer/Counter3-CounterRegisterLowByte - - - - FOC3C - - - - WGM33 WGM32 CS32 COM3B1 COM3B0 COM3C1 COM3C0 - - - - - - - - Timer/Counter1
-OutputCompareRegisterCHighByte Timer/Counter1-OutputCompareRegisterCLowByte Timer/Counter1-OutputCompareRegisterBHighByte Timer/Counter1-OutputCompareRegisterBLowByte Timer/Counter1-OutputCompareRegisterAHighByte Timer/Counter1-OutputCompareRegisterALowByte Timer/Counter1-InputCaptureRegisterHighByte Timer/Counter1-InputCaptureRegisterLowByte Timer/Counter1-CounterRegisterHighByte Timer/Counter1-CounterRegisterLowByte - - - - FOC1C - - - - WGM13 WGM12 CS12 COM1B1 COM1B0 COM1C1 COM1C0 - - - - ADC5D ADC4D ADC3D ADC2D ADC13D ADC12D ADC11D ADC10D ADLAR MUX4 MUX3 MUX2 - - MUX5 ADTS2 ADATE ADIF ADIE ADPS2 ADC
DataRegisterHighbyte Bit1 TWA0TWPS1 TCR2AUB - CS21WGM21 - CS41WGM41- CS31WGM31- CS11WGM11AIN1DADC1DADC9DMUX1ADTS1ADPS1 Bit0 TWIETWGCETWPS0 TCR2BUB - CS20WGM20 - CS40WGM40- CS30WGM30- CS10WGM10AIN0DADC0DADC8DMUX0ADTS0ADPS0 Page page261page263page263page262page261 page179 page186page186page186page185page186 page160page160page160page160page159page159page161page161page158page158 page157page156page154 page159page159page159page159page159page159page161page161page158page158 page157page156page154 page159page159page159page159page159page159page160page160page158page158 page157page156page154page267page287page288page281page266,282,287page285page286 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 13 2549QS–AVR–02/2014 Address (0x78)(0x77)(0x76)(0x75)(0x74)(0x73)(0x72)(0x71)(0x70)(0x6F)(0x6E)(0x6D)(0x6C)(0x6B)(0x6A)(0x69)(0x68)(0x67)(0x66)(0x65)(0x64)(0x63)(0x62)(0x61)(0x60)0x3F(0x5F)0x3E(0x5E)0x3D(0x5D)0x3C(0x5C)0x3B(0x5B)0x3A(0x5A)0x39(0x59)0x38(0x58)0x37(0x57)0x36(0x56)0x35(0x55)0x34(0x54)0x33(0x53)0x32(0x52)0x31(0x51)0x30(0x50)0x2F(0x4F)0x2E(0x4E)0x2D(0x4D)0x2C(0x4C)0x2B(0x4B)0x2A(0x4A)0x29(0x49)0x28(0x48)0x27(0x47)0x26(0x46)0x25(0x45)0x24(0x44)0x23(0x43)0x22(0x42)0x21(0x41)0x20(0x40)0x1F(0x3F)0x1E(0x3E)0x1D(0x3D)0x1C(0x3C)0x1B(0x3B)0x1A(0x3A)0x19(0x39)0x18(0x38)0x17(0x37)0x16(0x36)0x15(0x35) Name ADCLReservedReservedXMCRBXMCRATIMSK5TIMSK4TIMSK3TIMSK2TIMSK1TIMSK0PCMSK2PCMSK1PCMSK0 EICRBEICRAPCICRReservedOSCCALPRR1PRR0ReservedReservedCLKPRWDTCSRSREGSPH SPLEINDRAMPZReservedReservedReservedSPMCSRReservedMCUCRMCUSRSMCRReservedOCDRACSRReservedSPDRSPSRSPCRGPIOR2GPIOR1ReservedOCR0BOCR0ATCNT0TCCR0BTCCR0AGTCCREEARHEEARLEEDREECRGPIOR0EIMSKEIFRPCIFRTIFR5TIFR4TIFR3TIFR2TIFR1TIFR0 Bit7 XMBKSREPCINT23PCINT15PCINT7ISC71ISC31- PRTWI CLKPCEWDIFISP15SP7SPMIEJTDOCDR7ACD- SPIFSPIE - FOC0ACOM0A1 TSM- - INT7INTF7 - Bit6 SRL2PCINT22PCINT14PCINT6ISC70ISC30- PRTIM2 WDIETSP14SP6RWWSBOCDR6ACBG- WCOLSPE - FOC0BCOM0A0 - - INT6INTF6 - Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 ADCDataRegisterLowbyte - - - - - - - - - - - - - - - XMM2 XMM1 XMM0 SRL1 SRL0 SRW11 SRW10 SRW01 SRW00 ICIE5 - OCIE5C OCIE5B OCIE5A TOIE5 ICIE4 - OCIE4C OCIE4B OCIE4A TOIE4 ICIE3 - OCIE3C OCIE3B OCIE3A TOIE3 - - - OCIE2B OCIE2A TOIE2 ICIE1 - OCIE1C OCIE1B OCIE1A TOIE1 - - - OCIE0B OCIE0A TOIE0 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 ISC61 ISC60 ISC51 ISC50 ISC41 ISC40 ISC21 ISC20 ISC11 ISC10 ISC01 ISC00 - - - PCIE2 PCIE1 PCIE0 - - - - - - Oscillator
CalibrationRegister PRTIM5 PRTIM4 PRTIM3 PRUSART3PRUSART2 PRUSART1 PRTIM0 - PRTIM1 PRSPI PRUSART0 PRADC - - - - - - - - - - - - - - CLKPS3 CLKPS2 CLKPS1 CLKPS0 WDP3 WDCE WDE WDP2 WDP1 WDP0
H S
V N
Z C SP13 SP12 SP11 SP10 SP9 SP8 SP5 SP4 SP3 SP2 SP1 SP0 - - - - - EIND0 - - - - RAMPZ1 RAMPZ0 - - - - - - - - - - - - - - - - - - SIGRD RWWSRE BLBSET PGWRT PGERS SPMEN - - - - - - - PUD - - IVSEL IVCE - JTRF WDRF BORF EXTRF PORF - - SM2 SM1 SM0 SE - - - - - - OCDR5 OCDR4 OCDR3 OCDR2 OCDR1 OCDR0 ACO ACI ACIE ACIC ACIS1 ACIS0 - - - - - - SPI
DataRegister - - - - - SPI2X DORD MSTR CPOL CPHA SPR1 SPR0 GeneralPurposeI/ORegister2 GeneralPurposeI/ORegister1 - - - - - - Timer/Counter0OutputCompareRegisterB Timer/Counter0OutputCompareRegisterA Timer/Counter0(8Bit) - - WGM02 CS02 CS01 CS00 COM0B1 COM0B0 - - WGM01 WGM00 - - - - PSRASY PSRSYNC - - EEPROM
AddressRegisterHighByte EEPROMAddressRegisterLowByte EEPROMDataRegister EEPM1 EEPM0 EERIE EEMPE EEPE EERE GeneralPurposeI/ORegister0 INT5 INT4 INT3 INT2 INT1 INT0 INTF5 INTF4 INTF3 INTF2 INTF1 INTF0 - - - PCIF2 PCIF1 PCIF0 ICF5 - OCF5C OCF5B OCF5A TOV5 ICF4 - OCF4C OCF4B OCF4A TOV4 ICF3 - OCF3C OCF3B OCF3A TOV3 - - - OCF2B OCF2A TOV2 ICF1 - OCF1C OCF1B OCF1A TOV1 - - - OCF0B OCF0A TOV0 Page page
286 page38page36page162page161page161page188page161page131page113page113page114page110page110page112 page48page56page55 page48page65page13page15page15page16page16 page323 page64,108,96,301page301page50 page294page266 page199page198page197page36page36 page130page130page130page129page126page166,189page34page34page34page34page36page111page112page113page162page162page162page188page162page131 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 14 2549QS–AVR–02/2014 Address 0x14(0x34)0x13(0x33)0x12(0x32)0x11(0x31)0x10(0x30)0x0F(0x2F)0x0E(0x2E)0x0D(0x2D)0x0C(0x2C)0x0B(0x2B)0x0A(0x2A)0x09(0x29)0x08(0x28)0x07(0x27)0x06(0x26)0x05(0x25)0x04(0x24)0x03(0x23)0x02(0x22)0x01(0x21)0x00(0x20) Name PORTGDDRGPINGPORTFDDRFPINFPORTEDDREPINEPORTDDDRDPINDPORTCDDRCPINCPORTBDDRBPINBPORTADDRAPINA Bit7 PORTF7DDF7PINF7PORTE7DDE7PINE7PORTD7DDD7PIND7PORTC7DDC7PINC7PORTB7DDB7PINB7PORTA7DDA7PINA7 Bit6 PORTF6DDF6PINF6PORTE6DDE6PINE6PORTD6DDD6PIND6PORTC6DDC6PINC6PORTB6DDB6PINB6PORTA6DDA6PINA6 Bit5 PORTG5DDG5PING5 PORTF5DDF5PINF5 PORTE5DDE5PINE5 PORTD5DDD5PIND5 PORTC5DDC5PINC5 PORTB5DDB5PINB5 PORTA5DDA5PINA5 Bit4 PORTG4DDG4PING4 PORTF4DDF4PINF4 PORTE4DDE4PINE4 PORTD4DDD4PIND4 PORTC4DDC4PINC4 PORTB4DDB4PINB4 PORTA4DDA4PINA4 Bit3 PORTG3DDG3PING3 PORTF3DDF3PINF3 PORTE3DDE3PINE3 PORTD3DDD3PIND3 PORTC3DDC3PINC3 PORTB3DDB3PINB3 PORTA3DDA3PINA3 Bit2 PORTG2DDG2PING2 PORTF2DDF2PINF2 PORTE2DDE2PINE2 PORTD2DDD2PIND2 PORTC2DDC2PINC2 PORTB2DDB2PINB2 PORTA2DDA2PINA2 Bit1 PORTG1DDG1PING1 PORTF1DDF1PINF1 PORTE1DDE1PINE1 PORTD1DDD1PIND1 PORTC1DDC1PINC1 PORTB1DDB1PINB1 PORTA1DDA1PINA1 Bit0 PORTG0DDG0PING0 PORTF0DDF0PINF0 PORTE0DDE0PINE0 PORTD0DDD0PIND0 PORTC0DDC0PINC0 PORTB0DDB0PINB0 PORTA0DDA0PINA0 Page page98page98page98page97page98page98page97page97page98page97page97page97page97page97page97page96page96page96page96page96page96 Notes: 1.patibilitywithfuturedevices,reservedbitsshouldbewrittentozeroifessed.ReservedI/Omemoryaddressesshouldneverbewritten.
2.I/Oregisterswithintheaddressrange$00-$1FaredirectlyessibleusingtheSBIandCBIinstructions.Intheseregisters,thevalueofsinglebitscanbecheckedbyusingtheSBISandSBICinstructions.
3.Someofthestatusflagsareclearedbywritingalogicalonetothem.NotethattheCBIandSBIinstructionswilloperateonallbitsintheI/Oregister,writingaonebackintoanyflagreadasset,thusclearingtheflag.TheCBIandSBIinstructionsworkwithregisters0x00to0x1Fonly.
4.WhenusingtheI/OmandsINandOUT,theI/Oaddresses$00-$3Fmustbeused.WhenaddressingI/OregistersasdataspaceusingLDandSTinstructions,$20mustbeaddedtotheseaddresses.TheATmega640/1280/1281/2560/2561isplexmicrocontrollerwithmoreperipheralunitsthancanbesupportedwithinthe64locationreservedinOpcodefortheINandOUTinstructions.FortheExtendedI/Ospacefrom$60-$1FFinSRAM,onlytheST/STS/STDandLD/LDS/LDDinstructionscanbeused. ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 15 2549QS–AVR–02/2014
8.InstructionSetSummary Mnemonics Operands Description ARITHMETICANDLOGICINSTRUCTIONS ADD Rd,Rr AddtwoRegisters ADC Rd,Rr AddwithCarrytwoRegisters ADIW Rdl,
K AddImmediatetoWord SUB Rd,Rr SubtracttwoRegisters SUBI Rd,
K SubtractConstantfromRegister SBC Rd,Rr SubtractwithCarrytwoRegisters SBCI Rd,
K SubtractwithCarryConstantfromReg. SBIW Rdl,
K SubtractImmediatefromWord AND Rd,Rr LogicalANDRegisters ANDI Rd,
K LogicalANDRegisterandConstant OR Rd,Rr LogicalORRegisters ORI Rd,
K LogicalORRegisterandConstant EOR Rd,Rr ExclusiveORRegisters COM Rd One’sComplement NEG Rd Two’sComplement SBR Rd,
K SetBit(s)inRegister CBR Rd,
K ClearBit(s)inRegister INC Rd Increment DEC Rd Decrement TST Rd TestforZeroorMinus CLR Rd ClearRegister SER Rd SetRegister MUL Rd,Rr MultiplyUnsigned MULS Rd,Rr MultiplySigned MULSU Rd,Rr MultiplySignedwithUnsigned FMUL Rd,Rr FractionalMultiplyUnsigned FMULS Rd,Rr FractionalMultiplySigned FMULSU Rd,Rr FractionalMultiplySignedwithUnsigned BRANCHINSTRUCTIONS RJMP k RelativeJump IJMP IndirectJumpto(Z) EIJMP ExtendedIndirectJumpto(Z) JMP k DirectJump RCALL k RelativeSubroutineCall ICALL IndirectCallto(Z) EICALL ExtendedIndirectCallto(Z) CALL k DirectSubroutineCall RET SubroutineReturn RETI InterruptReturn CPSE Rd,Rr Compare,SkipifEqual CP Rd,Rr Compare CPC Rd,Rr ComparewithCarry CPI Rd,
K CompareRegisterwithImmediate SBRC Rr,b SkipifBitinRegisterCleared SBRS Rr,b SkipifBitinRegisterisSet SBIC P,b SkipifBitinI/ORegisterCleared SBIS P,b SkipifBitinI/ORegisterisSet BRBS s,k BranchifStatusFlagSet BRBC s,k BranchifStatusFlagCleared BREQ k BranchifEqual BRNE k BranchifNotEqual BRCS k BranchifCarrySet BRCC k BranchifCarryCleared BRSH k BranchifSameorHigher BRLO k BranchifLower BRMI k BranchifMinus BRPL k BranchifPlus BRGE k BranchifGreaterorEqual,Signed BRLT k BranchifLessThanZero,Signed BRHS k BranchifHalfCarryFlagSet BRHC k BranchifHalfCarryFlagCleared BRTS k BranchifTFlagSet BRTC k BranchifTFlagCleared BRVS k BranchifOverflowFlagisSet Operation RdRd+RrRdRd+Rr+CRdh:RdlRdh:Rdl+KRdRd-RrRdRd-KRdRd-Rr-CRdRd-K-CRdh:RdlRdh:Rdl-KRdRdRrRdRdKRdRdvRrRdRdvKRdRdRrRd0xFFRdRd0x00RdRdRdvKRdRd(0xFF-K)RdRd+1RdRd1RdRdRdRdRdRdRd0xFFR1:R0RdxRrR1:R0RdxRrR1:R0RdxRr R1:R0(RdxRr)<<1R1:R0(RdxRr)<<1R1:R0(RdxRr)<<
1 PCPC+k+1PCZPC(EIND:Z)PCkPCPC+k+1PCZPC(EIND:Z)PCkPCSTACKPCSTACKif(Rd=Rr)PCPC+2or3RdRrRdRrCRdKif(Rr(b)=0)PCPC+2or3if(Rr(b)=1)PCPC+2or3if(P(b)=0)PCPC+2or3if(P(b)=1)PCPC+2or3if(SREG(s)=1)thenPCPC+k+1if(SREG(s)=0)thenPCPC+k+1if(Z=1)thenPCPC+k+1if(Z=0)thenPCPC+k+1if(C=1)thenPCPC+k+1if(C=0)thenPCPC+k+1if(C=0)thenPCPC+k+1if(C=1)thenPCPC+k+1if(N=1)thenPCPC+k+1if(N=0)thenPCPC+k+1if(NV=0)thenPCPC+k+1if(NV=1)thenPCPC+k+1if(H=1)thenPCPC+k+1if(H=0)thenPCPC+k+1if(T=1)thenPCPC+k+1if(T=0)thenPCPC+k+1if(V=1)thenPCPC+k+
1 Flags
Z,C,
N,V,HZ,
C,N,
V,HZ,
C,N,
V,SZ,
C,N,
V,HZ,
C,N,
V,HZ,
C,N,
V,HZ,
C,N,
V,HZ,
C,N,
V,SZ,
N,VZ,
N,VZ,
N,VZ,
N,VZ,
N,VZ,
C,N,VZ,
C,N,
V,HZ,
N,VZ,
N,VZ,
N,VZ,
N,VZ,
N,VZ,
N,VNoneZ,CZ,CZ,CZ,CZ,CZ,
C NoneNoneNoneNoneNoneNoneNoneNoneNoneINoneZ,
N,V,
C,HZ,
N,V,
C,HZ,
N,V,
C,HNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNone #Clocks 1121111211111111111111222222 22234445551/2/31111/2/31/2/31/2/31/2/31/21/21/21/21/21/21/21/21/21/21/21/21/21/21/21/21/2 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 16 2549QS–AVR–02/2014 Mnemonics Operands BRVC k BRIE k BRID k BITANDBIT-TESTINSTRUCTIONS SBI P,b CBI P,b LSL Rd LSR Rd ROL Rd ROR Rd ASR Rd SWAP Rd BSET s BCLR s BST Rr,
b BLD Rd,b SEC CLC SEN CLN SEZ CLZ SEI CLI SES CLS SEV CLV SET CLT SEH CLH DATATRANSFERINSTRUCTIONS MOV Rd,Rr MOVW Rd,Rr LDI Rd,
K LD Rd,
X LD Rd,X+ LD Rd,-
X LD Rd,
Y LD Rd,Y+ LD Rd,-
Y LDD Rd,Y+q LD Rd,
Z LD Rd,Z+ LD Rd,-
Z LDD Rd,Z+q LDS Rd,k ST
X,Rr ST X+,Rr ST -
X,Rr ST
Y,Rr ST Y+,Rr ST -
Y,Rr STD Y+q,Rr ST
Z,Rr ST Z+,Rr ST -
Z,Rr STD Z+q,Rr STS k,Rr LPM LPM Rd,
Z LPM Rd,Z+ ELPM ELPM Rd,
Z ELPM Rd,Z+ SPM IN Rd,
P Description BranchifOverflowFlagisClearedBranchifInterruptEnabledBranchifInterruptDisabled SetBitinI/ORegisterClearBitinI/ORegisterLogicalShiftLeftLogicalShiftRightRotateLeftThroughCarryRotateRightThroughCarryArithmeticShiftRightSwapNibblesFlagSetFlagClearBitStorefromRegistertoTBitloadfromTtoRegisterSetCarryClearCarrySetNegativeFlagClearNegativeFlagSetZeroFlagClearZeroFlagGlobalInterruptEnableGlobalInterruptDisableSetSignedTestFlagClearSignedTestFlagSetTwosComplementOverflow.ClearTwosComplementOverflowSetTinSREGClearTinSREGSetHalfCarryFlaginSREGClearHalfCarryFlaginSREG MoveBetweenRegistersCopyRegisterWordLoadImmediateLoadIndirectLoadIndirectandPost-Inc.LoadIndirectandPre-Dec.LoadIndirectLoadIndirectandPost-Inc.LoadIndirectandPre-Dec.LoadIndirectwithDisplacementLoadIndirectLoadIndirectandPost-Inc.LoadIndirectandPre-Dec.LoadIndirectwithDisplacementLoadDirectfromSRAMStoreIndirectStoreIndirectandPost-Inc.StoreIndirectandPre-Dec.StoreIndirectStoreIndirectandPost-Inc.StoreIndirectandPre-Dec.StoreIndirectwithDisplacementStoreIndirectStoreIndirectandPost-Inc.StoreIndirectandPre-Dec.StoreIndirectwithDisplacementStoreDirecttoSRAMLoadProgramMemoryLoadProgramMemoryLoadProgramMemoryandPost-IncExtendedLoadProgramMemoryExtendedLoadProgramMemoryExtendedLoadProgramMemoryStoreProgramMemoryInPort Operation if(V=0)thenPCPC+k+1if(I=1)thenPCPC+k+1if(I=0)thenPCPC+k+
1 I/O(P,b)1I/O(P,b)0Rd(n+1)Rd(n),Rd
(0)0Rd(n)Rd(n+1),Rd
(7)0Rd
(0)
C,Rd(n+1)Rd(n),CRd
(7)Rd
(7)
C,Rd(n)Rd(n+1),CRd
(0)Rd(n)Rd(n+1),n=0..6Rd(3..0)Rd(7..4),Rd(7..4)Rd(3..0)SREG(s)1SREG(s)0TRr(b)Rd(b)TC1C0N1N0Z1Z0I1I0S1S0V1V0T1T0H1H
0 RdRrRd+1:RdRr+1:RrRdKRd(X)Rd(X),XX+1XX-
1,Rd(X)Rd(Y)Rd(Y),YY+1YY-
1,Rd(Y)Rd(Y+q)Rd(Z)Rd(Z),ZZ+1ZZ-
1,Rd(Z)Rd(Z+q)Rd(k)(X)Rr(X)Rr,XX+1XX-
1,(X)Rr(Y)Rr(Y)Rr,YY+1YY-
1,(Y)Rr(Y+q)Rr(Z)Rr(Z)Rr,ZZ+1ZZ-
1,(Z)Rr(Z+q)Rr(k)RrR0(Z)Rd(Z)Rd(Z),ZZ+1R0(RAMPZ:Z)Rd(RAMPZ:Z)Rd(RAMPZ:Z),RAMPZ:ZRAMPZ:Z+1(Z)R1:R0Rd
P Flags NoneNoneNone NoneNoneZ,
C,N,VZ,
C,N,VZ,
C,N,VZ,
C,N,VZ,
C,N,VNoneSREG(s)SREG(s)TNoneCCNNZZIISSVVTTHH NoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNoneNone #Clocks 1/21/21/2 2211111111111111111111111111 1112222222222222222222222223333331 ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 17 2549QS–AVR–02/2014 Mnemonics Operands Description OUT
P,Rr PUSH Rr POP Rd MCUCONTROLINSTRUCTIONS NOP SLEEP WDR BREAK OutPortPushRegisteronStackPopRegisterfromStack NoOperationSleepWatchdogResetBreak Note: EICALLandEIJMPdonotexistinATmega640/1280/1281.ELPMdoesnotexistinATmega640. PRrSTACKRrRdSTACK Operation (seespecificdescr.forSleepfunction)(seespecificdescr.forWDR/timer)ForOn-chipDebugOnly Flags NoneNoneNone NoneNoneNoneNone #Clocks 122 111N/A ATmega640/V-1280/V-1281/V-2560/V-2561/V[DATASHEET] 18 2549QS–AVR–02/2014
9.OrderingInformation 9.1ATmega640 Speed[MHz]
(2)PowerSupply OrderingCode Package
(1)(3) OperationRange ATmega640V-8AU ATmega640V-8AUR
(4)
8 1.8-5.5V ATmega640V-8CU ATmega640V-8CUR
(4) ATmega640-16AU ATmega640-16AUR
(4) 16 2.7-5.5V ATmega640-16CU ATmega640-16CUR
(4) 100A100A100C1100C1 100A100A100C1100C1 Industrial(-40Cto85C) Notes:
1.Thisdevicecanalsobesuppliedinwaferform.ContactyourlocalAtmelsalesofficefordetailedorderinginformationandminimumquantities.
2.See“SpeedGrades”onpage357.3.Pb-freepackaging,pliestotheEuropeanDirectiveforRestrictionofHazardousSubstances(RoHSdirective).Also HalidefreeandfullyGreen.4.Tape&Reel. 100A100C1 PackageType100-lead,Thin(1.0mm)PlasticGullWingQuadFlatPackage(TQFP)100-ball,ChipBallGridArray(CBGA) ATmega640/V-1280/V-1281/V-2560/V-2561/V[SUMMARY] 19 2549QS–AVR–02/2014 9.2ATmega1280 Speed[MHz]
(2)PowerSupply OrderingCode Package
(1)(3) OperationRange ATmega1280V-8AU ATmega1280V-8AUR
(4)
8 1.8V-5.5V ATmega1280V-8CU ATmega1280V-8CUR
(4) ATmega1280-16AU ATmega1280-16AUR
(4) 16 2.7V-5.5V ATmega1280-16CU ATmega1280-16CUR
(4) 100A100A100C1100C1 100A100A100C1100C1 Industrial(-40Cto85C) Notes:
1.Thisdevicecanalsobesuppliedinwaferform.ContactyourlocalAtmelsalesofficefordetailedorderinginformationandminimumquantities.
2.See“SpeedGrades”onpage357.3.Pb-freepackaging,pliestotheEuropeanDirectiveforRestrictionofHazardousSubstances(RoHSdirective).Also HalidefreeandfullyGreen.4.Tape&Reel. 100A100C1 PackageType100-lead,Thin(1.0mm)PlasticGullWingQua